| Message ID | 20220622084730.GA1798@begut |
|---|---|
| State | Changes Requested |
| Delegated to: | Kever Yang |
| Headers | show |
El Wed, Jun 22, 2022 at 10:47:31AM +0200, Xavier Drudis Ferran deia: > The Radxa Rock Pi 4 board is sold from revision 1.4 with a soldered > 4Mb SPI NOR Flash. This series allows to use it from U-Boot and boot > from it. > Hello. Is there any interest in this ? This weekend I did a v2 on next. But I don't know whether I should send it or just save you all the trouble. I can boot from SPI (I mean, bootrom loads TPL from SPI, TPL return to bootrom, bootrom loads SPL from SPI, SPL loading U-Boot from SPI, then U-Boot loads linux and dtb from SDMMC) and can stop U-Boot and read, erase and write from SPI, But once I boot linux, flashrom -V --programmer linux_mtd --write /boot/spi.rom [...] get_mtd_info: device_name: "loader", is_writeable: 1, numeraseregions: 0, total_size: 4194304, erasesize: 4096 Opened /dev/mtd0 successfully The following protocols are supported: Programmer-specific. Probing for Programmer Opaque flash chip, 0 kB: Found Programmer flash chip "Opaque flash chip" (4096 kB, Programmer-specific) on linux_mtd. Found Programmer flash chip "Opaque flash chip" (4096 kB, Programmer-specific). Reading old flash chip contents... done. Erasing and writing flash chip... Trying erase function 0... 0x000000-0x000fff:WCannot write 0x001000 bytes at 0x000000 [...] If I boot from SDMMC (shorting spiclk to ground) then linux doesn't have a /dev/mtd0 device. But that's easy to fix. If I boot from SDMMC, stop U-boot, disconnect spiclk from gnd, sf probe 1:0 and continue boot then I can write /dev/mtd0 from flashrom in linux without a problem. I can also read, erase and write SPI from U-Boot. So there's something when booting from SPI that stops linux from writing to it, despite U-Boot can. I tested also sf protect unlock 0 0x400000 but it doesn't help. So should I send v2 ? wait until I understand what happens when booting from SPI but not writing to /dev/mtd0 ? Forget it ?
On Tue, Jul 12, 2022 at 2:41 PM Xavier Drudis Ferran <xdrudis@tinet.cat> wrote: > > El Wed, Jun 22, 2022 at 10:47:31AM +0200, Xavier Drudis Ferran deia: > > The Radxa Rock Pi 4 board is sold from revision 1.4 with a soldered > > 4Mb SPI NOR Flash. This series allows to use it from U-Boot and boot > > from it. > > > > Hello. > Is there any interest in this ? > > This weekend I did a v2 on next. But I don't know whether I should > send it or just save you all the trouble. > > I can boot from SPI (I mean, bootrom loads TPL from SPI, TPL return to > bootrom, bootrom loads SPL from SPI, SPL loading U-Boot from SPI, then > U-Boot loads linux and dtb from SDMMC) and can stop U-Boot and read, > erase and write from SPI, But once I boot linux, > > flashrom -V --programmer linux_mtd --write /boot/spi.rom > [...] > get_mtd_info: device_name: "loader", is_writeable: 1, numeraseregions: 0, total_size: 4194304, erasesize: 4096 > Opened /dev/mtd0 successfully > The following protocols are supported: Programmer-specific. > Probing for Programmer Opaque flash chip, 0 kB: Found Programmer flash chip "Opaque flash chip" (4096 kB, Programmer-specific) on linux_mtd. > Found Programmer flash chip "Opaque flash chip" (4096 kB, Programmer-specific). > Reading old flash chip contents... done. > Erasing and writing flash chip... Trying erase function 0... 0x000000-0x000fff:WCannot write 0x001000 bytes at 0x000000 > [...] > > If I boot from SDMMC (shorting spiclk to ground) then linux doesn't have > a /dev/mtd0 device. But that's easy to fix. If I boot from SDMMC, stop > U-boot, disconnect spiclk from gnd, sf probe 1:0 and continue boot > then I can write /dev/mtd0 from flashrom in linux without a problem. I > can also read, erase and write SPI from U-Boot. > > So there's something when booting from SPI that stops linux from > writing to it, despite U-Boot can. I tested also sf protect unlock 0 > 0x400000 but it doesn't help. > > So should I send v2 ? wait until I understand what happens when booting > from SPI but not writing to /dev/mtd0 ? Forget it ? We have SPI flash boot tested on existing boards, so please send the associate patches if you want to support for rock-pi-4. Thanks, Jagan.
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi index 100a76916..7fdb22a85 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi @@ -14,6 +14,13 @@ aliases { mmc0 = &sdmmc; mmc1 = &sdhci; + spi0 = &spi0; + spi1 = &spi1; + spi2 = &spi2; + spi3 = &spi3; + spi4 = &spi4; + spi5 = &spi5; + }; chosen { @@ -128,6 +135,12 @@ regulator-max-microvolt = <1400000>; vin-supply = <&vcc5v0_sys>; }; + + sound { + compatible = "audio-graph-card"; + label = "rockchip,rk33999"; + dais = <&i2s0_p0>; + }; }; &cpu_l0 { @@ -419,9 +432,28 @@ }; &i2c1 { - i2c-scl-rising-time-ns = <300>; i2c-scl-falling-time-ns = <15>; - status = "okay"; + i2c-scl-rising-time-ns = <300>; + status = "okay"; + + es8316: codec@11 { + compatible = "everest,es8316"; + reg = <0x11>; + clocks = <&cru SCLK_I2S_8CH_OUT>; + clock-names = "mclk"; + pinctrl-names = "default"; + pinctrl-0 = <&hp_det_pin>; + interrupt-parent = <&gpio1>; + interrupts = <RK_PA1 IRQ_TYPE_LEVEL_HIGH>; + #sound-dai-cells = <0>; + + port { + es8316_p0_0: endpoint { + remote-endpoint = <&i2s0_p0_0>; + }; + }; + }; + }; &i2c3 { @@ -441,6 +473,15 @@ rockchip,capture-channels = <2>; rockchip,playback-channels = <2>; status = "okay"; + + i2s0_p0: port { + i2s0_p0_0: endpoint { + dai-format = "i2s"; + mclk-fs = <256>; + remote-endpoint = <&es8316_p0_0>; + }; + }; + }; &i2s1 { @@ -481,6 +522,7 @@ vpcie1v8-supply = <&vcc_1v8>; vpcie3v3-supply = <&vcc3v3_pcie>; status = "okay"; + max-link-speed = <2>; }; &pinctrl { @@ -500,7 +542,7 @@ pcie { pcie_pwr_en: pcie-pwr-en { - rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; + rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up_20ma>; }; }; @@ -556,6 +598,20 @@ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + es8316 { + hp_det_pin: hp-det-pin { + rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + i2s0 { + i2s_8ch_mclk_pin: i2s-8ch-mclk-pin { + rockchip,pins = <4 RK_PA0 1 &pcfg_pull_none>; + }; + }; + + }; &pwm2 { @@ -596,6 +652,7 @@ }; &sdhci { + max-frequency = <150000000>; bus-width = <8>; mmc-hs400-1_8v; mmc-hs400-enhanced-strobe; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts index 6c63e6170..c04fee0f5 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts @@ -44,3 +44,29 @@ pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; }; }; + +&spi1 { + max-freq = <40000000>; + status = "okay"; + + spiflash: spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-max-frequency = <40000000>; + spi-cpol; + spi-cpha; + + status = "okay"; + + partitions { + compatible = "fixed-partitions"; + + loader@0 { + label = "loader"; + reg = <0x0 0x400000>; + }; + }; + }; +}; \ No newline at end of file diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index 6b904e439..e344077e3 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -17,6 +17,7 @@ spi-nor-objs += sst.o spi-nor-objs += winbond.o spi-nor-objs += xilinx.o spi-nor-objs += xmc.o +spi-nor-objs += xtx.o obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o obj-$(CONFIG_MTD_SPI_NOR) += controllers/ diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index cc08bd707..7ab768309 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -1846,6 +1846,7 @@ static const struct spi_nor_manufacturer *manufacturers[] = { &spi_nor_winbond, &spi_nor_xilinx, &spi_nor_xmc, + &spi_nor_xtx, }; static const struct flash_info * diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 3348e1dd1..fd2771fbe 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -489,6 +489,7 @@ extern const struct spi_nor_manufacturer spi_nor_sst; extern const struct spi_nor_manufacturer spi_nor_winbond; extern const struct spi_nor_manufacturer spi_nor_xilinx; extern const struct spi_nor_manufacturer spi_nor_xmc; +extern const struct spi_nor_manufacturer spi_nor_xtx; extern const struct attribute_group *spi_nor_sysfs_groups[]; diff --git a/drivers/mtd/spi-nor/xtx.c b/drivers/mtd/spi-nor/xtx.c new file mode 100644 index 000000000..3db8bfd93 --- /dev/null +++ b/drivers/mtd/spi-nor/xtx.c @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022, Xavier Drudis Ferran + * (based on eon.c from this directory + * and drivers/mtd/spi-nor/spi-nor.c from https://github.com/radxa/kernel.git ) + */ + +#include <linux/mtd/spi-nor.h> + +#include "core.h" + +static const struct flash_info xtx_parts[] = { + /* XTX -- xt25xxx */ + { "xt25f32b", INFO(0x0b4016, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_DUAL_READ) }, + { "xt25f128b", INFO(0x0b4018, 0, 64 * 1024, 256, SECT_4K) }, +}; + +const struct spi_nor_manufacturer spi_nor_xtx = { + .name = "xtx", + .parts = xtx_parts, + .nparts = ARRAY_SIZE(xtx_parts), +};