diff mbox series

ast2600: spl: Add boot mode detection

Message ID 20220601084352.22811-1-chiawei_wang@aspeedtech.com
State Accepted
Commit 12770d0df0e841cfa1bdbde7636aad3d531bf66b
Delegated to: Tom Rini
Headers show
Series ast2600: spl: Add boot mode detection | expand

Commit Message

ChiaWei Wang June 1, 2022, 8:43 a.m. UTC 
AST2600 supports boot from SPI(mmap), eMMC, and UART.
This patch adds the boot mode detection and return the
corresponding boot device type.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
---
 .../arm/include/asm/arch-aspeed/scu_ast2600.h |  3 ++
 arch/arm/mach-aspeed/ast2600/spl.c            | 30 +++++++++++++++++++
 2 files changed, 33 insertions(+)

Comments

Tom Rini June 23, 2022, 12:19 p.m. UTC | #1 
On Wed, Jun 01, 2022 at 04:43:52PM +0800, Chia-Wei Wang wrote:

> AST2600 supports boot from SPI(mmap), eMMC, and UART.
> This patch adds the boot mode detection and return the
> corresponding boot device type.
> 
> Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>

Applied to u-boot/next, thanks!
diff mbox series

Patch

diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2600.h b/arch/arm/include/asm/arch-aspeed/scu_ast2600.h
index 7c5aab98b6..251bfa269b 100644
--- a/arch/arm/include/asm/arch-aspeed/scu_ast2600.h
+++ b/arch/arm/include/asm/arch-aspeed/scu_ast2600.h
@@ -87,6 +87,9 @@ 
 #define SCU_HWSTRAP1_CPU_FREQ_SHIFT		8
 #define SCU_HWSTRAP1_MAC2_INTF			BIT(7)
 #define SCU_HWSTRAP1_MAC1_INTF			BIT(6)
+#define SCU_HWSTRAP1_BOOT_EMMC			BIT(2)
+
+#define SCU_HWSTRAP2_BOOT_UART			BIT(8)
 
 #define SCU_EFUSE_DIS_DP			BIT(17)
 #define SCU_EFUSE_DIS_VGA			BIT(14)
diff --git a/arch/arm/mach-aspeed/ast2600/spl.c b/arch/arm/mach-aspeed/ast2600/spl.c
index 6c49d6aede..53c8a15bf9 100644
--- a/arch/arm/mach-aspeed/ast2600/spl.c
+++ b/arch/arm/mach-aspeed/ast2600/spl.c
@@ -7,6 +7,7 @@ 
 #include <dm.h>
 #include <spl.h>
 #include <init.h>
+#include <linux/err.h>
 #include <asm/io.h>
 #include <asm/arch/scu_ast2600.h>
 #include <asm/global_data.h>
@@ -21,8 +22,37 @@  void board_init_f(ulong dummy)
 	dram_init();
 }
 
+/*
+ * Try to detect the boot mode. Fallback to the default,
+ * memory mapped SPI XIP booting if detection failed.
+ */
 u32 spl_boot_device(void)
 {
+	int rc;
+	struct udevice *scu_dev;
+	struct ast2600_scu *scu;
+
+	rc = uclass_get_device_by_driver(UCLASS_CLK,
+					 DM_DRIVER_GET(aspeed_ast2600_scu), &scu_dev);
+	if (rc) {
+		debug("%s: failed to get SCU driver\n", __func__);
+		goto out;
+	}
+
+	scu = devfdt_get_addr_ptr(scu_dev);
+	if (IS_ERR_OR_NULL(scu)) {
+		debug("%s: failed to get SCU base\n", __func__);
+		goto out;
+	}
+
+	/* boot from UART has higher priority */
+	if (scu->hwstrap2 & SCU_HWSTRAP2_BOOT_UART)
+		return BOOT_DEVICE_UART;
+
+	if (scu->hwstrap1 & SCU_HWSTRAP1_BOOT_EMMC)
+		return BOOT_DEVICE_MMC1;
+
+out:
 	return BOOT_DEVICE_RAM;
 }