| Message ID | 20220411162634.69647-6-ovpanait@gmail.com |
|---|---|
| State | Superseded |
| Delegated to: | Michal Simek |
| Headers | show |
| Series | [01/10] microblaze: start.S: remove unused code | expand |
On 4/11/22 18:26, Ovidiu Panait wrote: > Migrate XILINX_DCACHE_BYTE_SIZE to Kconfig and rename it to > XILINX_MICROBLAZE0_DEFAULT_CACHE_SIZE. Use it as the default size > for both instruction/data caches and get rid of the hardcoded value > in icache_disable(). Microblaze can have different icache and dcache sizes that's why there is a need to use two symbols to cover it. cache ranges are from 64B to 64KB. I think the best way how to handle this is save icache/dcache sizes to one static variable/structure because actually these Kconfig symbols should be really only use as default value. What Xilinx tools is doing that it generates XILINX_DCACHE_BYTE_SIZE based on current design and overwrites that macro. That's why there are ifndef around it. #ifndef XILINX_DCACHE_BYTE_SIZE #define XILINX_DCACHE_BYTE_SIZE 32768 #endif icache handling is not that sensitive because it is not working with data and self modifying code is not used. It means default value for dcache and icache setup to 32kB should be fine. And saving it to static variable can open good way to overwrite this structure based on information from DT or based on values from PVRs. Thanks, Michal
diff --git a/arch/microblaze/cpu/cache.c b/arch/microblaze/cpu/cache.c index e362a34a79..2814c1dc07 100644 --- a/arch/microblaze/cpu/cache.c +++ b/arch/microblaze/cpu/cache.c @@ -65,8 +65,7 @@ void icache_enable(void) void icache_disable(void) { - /* we are not generate ICACHE size -> flush whole cache */ - __invalidate_icache(0, 32768); + __invalidate_icache(0, CONFIG_XILINX_MICROBLAZE0_DEFAULT_CACHE_SIZE); MSRCLR(0x20); } @@ -78,7 +77,7 @@ void dcache_enable(void) void dcache_disable(void) { - __flush_dcache(0, XILINX_DCACHE_BYTE_SIZE); + __flush_dcache(0, CONFIG_XILINX_MICROBLAZE0_DEFAULT_CACHE_SIZE); MSRCLR(0x80); } diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index d1b0453caf..94984148de 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -53,7 +53,7 @@ _start: /* Flush cache before enable cache */ addik r5, r0, 0 - addik r6, r0, XILINX_DCACHE_BYTE_SIZE + addik r6, r0, CONFIG_XILINX_MICROBLAZE0_DEFAULT_CACHE_SIZE bralid r15, flush_cache nop @@ -284,7 +284,7 @@ relocate_code: /* Flush caches to ensure consistency */ addik r5, r0, 0 - addik r6, r0, XILINX_DCACHE_BYTE_SIZE + addik r6, r0, CONFIG_XILINX_MICROBLAZE0_DEFAULT_CACHE_SIZE bralid r15, flush_cache nop diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c index dba6226ce5..59b757c857 100644 --- a/arch/microblaze/lib/bootm.c +++ b/arch/microblaze/lib/bootm.c @@ -57,7 +57,7 @@ static void boot_jump_linux(bootm_headers_t *images, int flag) "(fake run for tracing)" : ""); bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel"); - flush_cache(0, XILINX_DCACHE_BYTE_SIZE); + flush_cache(0, CONFIG_XILINX_MICROBLAZE0_DEFAULT_CACHE_SIZE); if (!fake) { /* diff --git a/board/xilinx/microblaze-generic/Kconfig b/board/xilinx/microblaze-generic/Kconfig index 89af8d714f..505a3d59cf 100644 --- a/board/xilinx/microblaze-generic/Kconfig +++ b/board/xilinx/microblaze-generic/Kconfig @@ -77,4 +77,12 @@ config XILINX_MICROBLAZE0_USE_WIC Enable this option if the MicroBlaze processor is configured with support for the "wic" (Write to Instruction Cache) instruction. +config XILINX_MICROBLAZE0_DEFAULT_CACHE_SIZE + int "Default instruction/data cache size" + default 32768 + help + This fallback size will be used when no cache info can be found in + the device tree, or when the caches are flushed very early in the + boot process, before device tree is available. + endif diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 663837f33d..7b064eacb2 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -30,10 +30,6 @@ # define CONFIG_SYS_MAX_FLASH_SECT 2048 #endif -#ifndef XILINX_DCACHE_BYTE_SIZE -#define XILINX_DCACHE_BYTE_SIZE 32768 -#endif - /* size of console buffer */ #define CONFIG_SYS_CBSIZE 512 /* max number of command args */
Migrate XILINX_DCACHE_BYTE_SIZE to Kconfig and rename it to XILINX_MICROBLAZE0_DEFAULT_CACHE_SIZE. Use it as the default size for both instruction/data caches and get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> --- arch/microblaze/cpu/cache.c | 5 ++--- arch/microblaze/cpu/start.S | 4 ++-- arch/microblaze/lib/bootm.c | 2 +- board/xilinx/microblaze-generic/Kconfig | 8 ++++++++ include/configs/microblaze-generic.h | 4 ---- 5 files changed, 13 insertions(+), 10 deletions(-)