| Message ID | 20220317170346.31162-8-d-gerlach@ti.com |
|---|---|
| State | Accepted |
| Commit | 1a40ddffecf6ded31d9a5d1a5bbd750aa28e4cf2 |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | ram: k3-ddrss: Enable DDRSS ECC for full DDR Space | expand |
On Thu, Mar 17, 2022 at 12:03:45PM -0500, Dave Gerlach wrote: > Add 'ss_cfg' memory region for memorycontroller node which is required > to enable ECC. > > Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Applied to u-boot/master, thanks!
diff --git a/arch/arm/dts/k3-am64-ddr.dtsi b/arch/arm/dts/k3-am64-ddr.dtsi index 026a547f0e3a..8324b389e065 100644 --- a/arch/arm/dts/k3-am64-ddr.dtsi +++ b/arch/arm/dts/k3-am64-ddr.dtsi @@ -7,8 +7,9 @@ memorycontroller: memorycontroller@f300000 { compatible = "ti,am64-ddrss"; reg = <0x00 0x0f308000 0x00 0x4000>, - <0x00 0x43014000 0x00 0x100>; - reg-names = "cfg", "ctrl_mmr_lp4"; + <0x00 0x43014000 0x00 0x100>, + <0x00 0x0f300000 0x00 0x200>; + reg-names = "cfg", "ctrl_mmr_lp4", "ss_cfg"; power-domains = <&k3_pds 138 TI_SCI_PD_SHARED>, <&k3_pds 55 TI_SCI_PD_SHARED>; clocks = <&k3_clks 138 0>, <&k3_clks 16 4>;
Add 'ss_cfg' memory region for memorycontroller node which is required to enable ECC. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> --- arch/arm/dts/k3-am64-ddr.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)