[11/11] vexpress64: Add ARMv8R-64 board variant

From: Peter Hoyes <Peter.Hoyes@arm.com>

The ARMv8-R64 architecture introduces optional VMSA (paging based MMU)
support in the EL1/0 translation regime, which makes that part mostly
compatible to ARMv8-A.

Add a new board variant to describe the "BASE-R64" FVP model, which
inherits a lot from the existing v8-A FVP support. One major difference
is that the memory map in "inverted": DRAM starts at 0x0, MMIO is at
2GB [1].

 * Create new TARGET_VEXPRESS64_BASER_FVP target, sharing most of the
   exising configuration.
 * Implement inverted memory map in vexpress_aemv8.h
 * Create vexpress_aemv8r defconfig
 * Provide an MMU memory map for the BASER_FVP
 * Update vexpress64 documentation

At the moment the boot-wrapper is the only supported secure firmware. As
there is no official DT for the board yet, we rely on it being supplied
by the boot-wrapper into U-Boot, so use OF_HAS_PRIOR_STAGE, and go with
a dummy DT for now.

[1] https://developer.arm.com/documentation/100964/1114/Base-Platform/Base---memory/BaseR-Platform-memory-map

Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
[Andre: rebase and add Linux kernel header]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/dts/Makefile             |  1 +
 arch/arm/dts/arm_fvp.dts          | 11 +++++++++++
 board/armltd/vexpress64/Kconfig   | 22 +++++++++++++++++-----
 configs/vexpress_aemv8r_defconfig | 14 ++++++++++++++
 doc/arch/arm64.rst                |  3 ++-
 doc/board/armltd/vexpress64.rst   |  1 +
 include/configs/vexpress_aemv8.h  | 23 +++++++++++++++++++++++
 7 files changed, 69 insertions(+), 6 deletions(-)
 create mode 100644 arch/arm/dts/arm_fvp.dts
 create mode 100644 configs/vexpress_aemv8r_defconfig

On Fri, Mar 04, 2022 at 04:30:18PM +0000, Andre Przywara wrote:
> From: Peter Hoyes <Peter.Hoyes@arm.com>
> 
> The ARMv8-R64 architecture introduces optional VMSA (paging based MMU)
> support in the EL1/0 translation regime, which makes that part mostly
> compatible to ARMv8-A.
> 
> Add a new board variant to describe the "BASE-R64" FVP model, which
> inherits a lot from the existing v8-A FVP support. One major difference
> is that the memory map in "inverted": DRAM starts at 0x0, MMIO is at
> 2GB [1].
> 
>  * Create new TARGET_VEXPRESS64_BASER_FVP target, sharing most of the
>    exising configuration.

I know I'm arguing about the colour of the shed, but can we make the new target
easier to distinguish from the TARGET_VEXPRESS64_BASE_FVP by inserting an underscore
between BASE and R?

Best regards,
Liviu


>  * Implement inverted memory map in vexpress_aemv8.h
>  * Create vexpress_aemv8r defconfig
>  * Provide an MMU memory map for the BASER_FVP
>  * Update vexpress64 documentation
> 
> At the moment the boot-wrapper is the only supported secure firmware. As
> there is no official DT for the board yet, we rely on it being supplied
> by the boot-wrapper into U-Boot, so use OF_HAS_PRIOR_STAGE, and go with
> a dummy DT for now.
> 
> [1] https://developer.arm.com/documentation/100964/1114/Base-Platform/Base---memory/BaseR-Platform-memory-map
> 
> Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
> [Andre: rebase and add Linux kernel header]
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  arch/arm/dts/Makefile             |  1 +
>  arch/arm/dts/arm_fvp.dts          | 11 +++++++++++
>  board/armltd/vexpress64/Kconfig   | 22 +++++++++++++++++-----
>  configs/vexpress_aemv8r_defconfig | 14 ++++++++++++++
>  doc/arch/arm64.rst                |  3 ++-
>  doc/board/armltd/vexpress64.rst   |  1 +
>  include/configs/vexpress_aemv8.h  | 23 +++++++++++++++++++++++
>  7 files changed, 69 insertions(+), 6 deletions(-)
>  create mode 100644 arch/arm/dts/arm_fvp.dts
>  create mode 100644 configs/vexpress_aemv8r_defconfig
> 
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 4c8492cd7d..77e08d5331 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -1181,6 +1181,7 @@ dtb-$(CONFIG_TARGET_MX53PPD) += imx53-ppd.dtb
>  # Kconfig option to build all of these. See examples above.
>  dtb-$(CONFIG_TARGET_VEXPRESS_CA9X4) += vexpress-v2p-ca9.dtb
>  dtb-$(CONFIG_TARGET_VEXPRESS64_BASE_FVP) += fvp-base-revc.dtb
> +dtb-$(CONFIG_TARGET_VEXPRESS64_BASER_FVP) += arm_fvp.dtb
>  dtb-$(CONFIG_TARGET_VEXPRESS64_JUNO) += juno-r2.dtb
>  
>  dtb-$(CONFIG_TARGET_TOTAL_COMPUTE) += total_compute.dtb
> diff --git a/arch/arm/dts/arm_fvp.dts b/arch/arm/dts/arm_fvp.dts
> new file mode 100644
> index 0000000000..3a4ad5d180
> --- /dev/null
> +++ b/arch/arm/dts/arm_fvp.dts
> @@ -0,0 +1,11 @@
> +// SPDX-License-Identifier: GPL-2.0+ OR MIT
> +/*
> + * Empty device tree for the Arm Ltd FVP platform model
> +
> + * Copyright 2022 Arm Ltd.
> + */
> +
> +/dts-v1/;
> +
> +/ {
> +};
> diff --git a/board/armltd/vexpress64/Kconfig b/board/armltd/vexpress64/Kconfig
> index 512bbbe72e..a0314c6537 100644
> --- a/board/armltd/vexpress64/Kconfig
> +++ b/board/armltd/vexpress64/Kconfig
> @@ -9,19 +9,28 @@ config SYS_VENDOR
>  config SYS_CONFIG_NAME
>  	default "vexpress_aemv8"
>  
> -choice
> -	prompt "VExpress64 board variant"
> -
> -config TARGET_VEXPRESS64_BASE_FVP
> -	bool "Support Versatile Express ARMv8a FVP BASE model"
> +config VEXPRESS64_BASE_MODEL
> +	bool
>  	select SEMIHOSTING
>  	select VIRTIO_BLK if VIRTIO_MMIO
>  	select VIRTIO_NET if VIRTIO_MMIO
>  	select DM_ETH if VIRTIO_NET
>  	select LINUX_KERNEL_IMAGE_HEADER
>  	select POSITION_INDEPENDENT
> +
> +choice
> +	prompt "VExpress64 board variant"
> +
> +config TARGET_VEXPRESS64_BASE_FVP
> +	bool "Support Versatile Express ARMv8a FVP BASE model"
> +	select VEXPRESS64_BASE_MODEL
>  	select OF_BOARD
>  
> +config TARGET_VEXPRESS64_BASER_FVP
> +	bool "Support Versatile Express ARMv8r64 FVP BASE model"
> +	select VEXPRESS64_BASE_MODEL
> +	imply OF_HAS_PRIOR_STAGE
> +
>  config TARGET_VEXPRESS64_JUNO
>  	bool "Support Versatile Express Juno Development Platform"
>  	select PCIE_ECAM_GENERIC if PCI
> @@ -50,6 +59,7 @@ config LNX_KRNL_IMG_TEXT_OFFSET_BASE
>  config SYS_TEXT_BASE
>  	default 0x88000000 if TARGET_VEXPRESS64_BASE_FVP
>  	default 0xe0000000 if TARGET_VEXPRESS64_JUNO
> +	default 0x00001000 if TARGET_VEXPRESS64_BASER_FVP
>  
>  config SYS_MALLOC_LEN
>  	default 0x810000 if TARGET_VEXPRESS64_JUNO
> @@ -59,11 +69,13 @@ config SYS_MALLOC_F_LEN
>  	default 0x2000
>  
>  config SYS_LOAD_ADDR
> +	default 0x10000000 if TARGET_VEXPRESS64_BASER_FVP
>  	default 0x90000000
>  
>  config ENV_ADDR
>  	default 0x0BFC0000 if TARGET_VEXPRESS64_JUNO
>  	default 0x0FFC0000 if TARGET_VEXPRESS64_BASE_FVP
> +	default 0x8FFC0000 if TARGET_VEXPRESS64_BASER_FVP
>  
>  config ENV_SIZE
>  	default 0x10000 if TARGET_VEXPRESS64_JUNO
> diff --git a/configs/vexpress_aemv8r_defconfig b/configs/vexpress_aemv8r_defconfig
> new file mode 100644
> index 0000000000..612797e47d
> --- /dev/null
> +++ b/configs/vexpress_aemv8r_defconfig
> @@ -0,0 +1,14 @@
> +CONFIG_ARM=y
> +CONFIG_ARCH_VEXPRESS64=y
> +CONFIG_NR_DRAM_BANKS=2
> +CONFIG_DEFAULT_DEVICE_TREE="arm_fvp"
> +CONFIG_IDENT_STRING=" vexpress_aemv8r64"
> +CONFIG_TARGET_VEXPRESS64_BASER_FVP=y
> +CONFIG_REMAKE_ELF=y
> +CONFIG_BOOTDELAY=3
> +CONFIG_USE_BOOTARGS=y
> +CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x9c090000 rootfstype=ext4 root=/dev/vda2 rw rootwait"
> +# CONFIG_DISPLAY_CPUINFO is not set
> +CONFIG_SYS_PROMPT="VExpress64# "
> +# CONFIG_MMC is not set
> +CONFIG_VIRTIO_MMIO=y
> diff --git a/doc/arch/arm64.rst b/doc/arch/arm64.rst
> index 80498f6f6b..7c0713504c 100644
> --- a/doc/arch/arm64.rst
> +++ b/doc/arch/arm64.rst
> @@ -18,7 +18,8 @@ Notes
>     classical firmware (like initial hardware setup, CPU errata workarounds
>     or SMP bringup). U-Boot can be entered in EL2 when its main purpose is
>     that of a boot loader. It can drop to lower exception levels before
> -   entering the OS.
> +   entering the OS. For ARMv8-R it is recommened to enter at S-EL1, as for this
> +   architecture there is no S-EL3.
>  
>  2. U-Boot for arm64 is compiled with AArch64-gcc. AArch64-gcc
>     use rela relocation format, a tool(tools/relocate-rela) by Scott Wood
> diff --git a/doc/board/armltd/vexpress64.rst b/doc/board/armltd/vexpress64.rst
> index d87b1c38f5..a7f771d266 100644
> --- a/doc/board/armltd/vexpress64.rst
> +++ b/doc/board/armltd/vexpress64.rst
> @@ -6,6 +6,7 @@ Arm Versatile Express
>  The vexpress_* board configuration supports the following platforms:
>  
>   * FVP_Base_RevC-2xAEMvA
> + * FVP_BaseR_AEMv8R
>   * Juno development board
>  
>  Fixed Virtual Platforms
> diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h
> index 105f58ac8e..eb1f7a78d3 100644
> --- a/include/configs/vexpress_aemv8.h
> +++ b/include/configs/vexpress_aemv8.h
> @@ -20,8 +20,13 @@
>  #define CONFIG_SYS_BOOTM_LEN (64 << 20)      /* Increase max gunzip size */
>  
>  /* CS register bases for the original memory map. */
> +#ifdef CONFIG_TARGET_VEXPRESS64_BASER_FVP
> +#define V2M_DRAM_BASE			0x00000000
> +#define V2M_PA_BASE			0x80000000
> +#else
>  #define V2M_DRAM_BASE			0x80000000
>  #define V2M_PA_BASE			0x00000000
> +#endif
>  
>  #define V2M_PA_CS0			(V2M_PA_BASE + 0x00000000)
>  #define V2M_PA_CS1			(V2M_PA_BASE + 0x14000000)
> @@ -232,6 +237,24 @@
>  		"boot_name=boot.img\0"					\
>  		"boot_addr_r=" __stringify(VEXPRESS_BOOT_ADDR) "\0"
>  
> +#elif CONFIG_TARGET_VEXPRESS64_BASER_FVP		/* ARMv8-R base model */
> +
> +#define BOOT_TARGET_DEVICES(func)	\
> +	func(MEM, mem, na)		\
> +	FUNC_VIRTIO(func)		\
> +	func(PXE, pxe, na)		\
> +	func(DHCP, dhcp, na)
> +
> +#define VEXPRESS_KERNEL_ADDR		0x00200000
> +#define VEXPRESS_PXEFILE_ADDR		0x0fb00000
> +#define VEXPRESS_FDT_ADDR		0x0fc00000
> +#define VEXPRESS_SCRIPT_ADDR		0x0fd00000
> +#define VEXPRESS_RAMDISK_ADDR		0x0fe00000
> +
> +#define EXTRA_ENV_NAMES							\
> +					"kernel_name=Image\0"		\
> +					"ramdisk_name=ramdisk.img\0"	\
> +					"fdtfile=board.dtb\0"
>  #endif
>  
>  #include <config_distro_bootcmd.h>
> -- 
> 2.25.1
>

On Fri, Mar 04, 2022 at 04:30:18PM +0000, Andre Przywara wrote:

> From: Peter Hoyes <Peter.Hoyes@arm.com>
> 
> The ARMv8-R64 architecture introduces optional VMSA (paging based MMU)
> support in the EL1/0 translation regime, which makes that part mostly
> compatible to ARMv8-A.
> 
> Add a new board variant to describe the "BASE-R64" FVP model, which
> inherits a lot from the existing v8-A FVP support. One major difference
> is that the memory map in "inverted": DRAM starts at 0x0, MMIO is at
> 2GB [1].
> 
>  * Create new TARGET_VEXPRESS64_BASER_FVP target, sharing most of the
>    exising configuration.
>  * Implement inverted memory map in vexpress_aemv8.h
>  * Create vexpress_aemv8r defconfig
>  * Provide an MMU memory map for the BASER_FVP
>  * Update vexpress64 documentation
> 
> At the moment the boot-wrapper is the only supported secure firmware. As
> there is no official DT for the board yet, we rely on it being supplied
> by the boot-wrapper into U-Boot, so use OF_HAS_PRIOR_STAGE, and go with
> a dummy DT for now.
> 
> [1] https://developer.arm.com/documentation/100964/1114/Base-Platform/Base---memory/BaseR-Platform-memory-map
> 
> Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
> [Andre: rebase and add Linux kernel header]
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Added Peter to the MAINTAINERS file and applied to u-boot/next, thanks!