diff mbox series

[2/3] net: xilinx: Move setup of 1G MAC to a function

Message ID 20220120073420.1887809-2-andy.chiu@sifive.com
State Deferred
Delegated to: Tom Rini
Headers show
Series [1/3] net: xilinx: fix load access fault | expand

Commit Message

Andy Chiu Jan. 20, 2022, 7:34 a.m. UTC 
Separate the flow out so that it would be easiler to implement error
handling logic.

Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
---

 drivers/net/xilinx_axi_emac.c | 50 +++++++++++++++++++++--------------
 1 file changed, 30 insertions(+), 20 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c
index 3117dae05e..dbda6c70d8 100644
--- a/drivers/net/xilinx_axi_emac.c
+++ b/drivers/net/xilinx_axi_emac.c
@@ -763,38 +763,48 @@  static int axiemac_miiphy_write(struct mii_dev *bus, int addr, int devad,
 	return phywrite(bus->priv, addr, reg, value);
 }
 
-static int axi_emac_probe(struct udevice *dev)
+static int axiemac_setup_emac(struct udevice *dev)
 {
 	struct axidma_plat *plat = dev_get_plat(dev);
 	struct eth_pdata *pdata = &plat->eth_pdata;
 	struct axidma_priv *priv = dev_get_priv(dev);
 	int ret;
 
+	priv->eth_hasnobuf = plat->eth_hasnobuf;
+	priv->phyaddr = plat->phyaddr;
+	priv->phy_of_handle = plat->phy_of_handle;
+	priv->interface = pdata->phy_interface;
+
+	priv->bus = mdio_alloc();
+	priv->bus->read = axiemac_miiphy_read;
+	priv->bus->write = axiemac_miiphy_write;
+	priv->bus->priv = priv;
+
+	ret = mdio_register_seq(priv->bus, dev_seq(dev));
+	if (ret)
+		return ret;
+
+	axiemac_phy_init(dev);
+
+	return ret;
+}
+
+static int axi_emac_probe(struct udevice *dev)
+{
+	struct axidma_plat *plat = dev_get_plat(dev);
+	struct eth_pdata *pdata = &plat->eth_pdata;
+	struct axidma_priv *priv = dev_get_priv(dev);
+
 	priv->iobase = (struct axi_regs *)pdata->iobase;
 	priv->dmatx = plat->dmatx;
 	/* RX channel offset is 0x30 */
 	priv->dmarx = (struct axidma_reg *)((phys_addr_t)priv->dmatx + 0x30);
 	priv->mactype = plat->mactype;
 
-	if (priv->mactype == EMAC_1G) {
-		priv->eth_hasnobuf = plat->eth_hasnobuf;
-		priv->phyaddr = plat->phyaddr;
-		priv->phy_of_handle = plat->phy_of_handle;
-		priv->interface = pdata->phy_interface;
-
-		priv->bus = mdio_alloc();
-		priv->bus->read = axiemac_miiphy_read;
-		priv->bus->write = axiemac_miiphy_write;
-		priv->bus->priv = priv;
-
-		ret = mdio_register_seq(priv->bus, dev_seq(dev));
-		if (ret)
-			return ret;
-
-		axiemac_phy_init(dev);
-	}
-
-	return 0;
+	if (priv->mactype == EMAC_1G)
+		return axiemac_setup_emac(dev);
+	else
+		return 0;
 }
 
 static int axi_emac_remove(struct udevice *dev)