From patchwork Tue Dec 21 11:20:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 1571600 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=ZW4sypMI; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4JJDZQ2RXCz9s0r for ; Tue, 21 Dec 2021 22:22:22 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 2DB7D83451; Tue, 21 Dec 2021 12:21:39 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="ZW4sypMI"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id A58908192E; Tue, 21 Dec 2021 12:21:05 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 4A016833C3 for ; Tue, 21 Dec 2021 12:20:46 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id CB85761530; Tue, 21 Dec 2021 11:20:44 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 79FC6C36AE9; Tue, 21 Dec 2021 11:20:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1640085644; bh=rJmyChO+1CKivLT5vMty7ewvj+wLfHO208oVe+w6Iuw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZW4sypMI27FxtUKNGmS1p3LeuhwT6gcpyeILvUfg9yLsSAoyop43a5qZgr+CJJtab NrJ9W4B9K7QA5qA3wRLPi+RwyB2IdwdMFd/B52D3OVONAMLyalv3S4QgbcYqVwAvtd oPhrz3Ko31Gr64R573HmxXVrBhnQxFFmbwpEACmo6a4SKSNX2EK0YSQHceoAaLW8BN HN8vfgL3SD01d20blsV7Ge1a4VCDyn0eO1+BywKlbLyu6KqqdM7gxrUgfVu4Lq0lF/ 5tuQ25/bOSlt+CgjCzM7olEQ2pFtNiJ1Uvpq+kXAJp5MHGYR/mSiN+KeFb9/BH3u4e ch/mpMTSAxltQ== Received: by pali.im (Postfix) id 4B3672851; Tue, 21 Dec 2021 12:20:42 +0100 (CET) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Stefan Roese , Dirk Eibach , Mario Six , =?utf-8?q?Marek_Beh=C3=BAn?= , Chris Packham Cc: u-boot@lists.denx.de Subject: [PATCH u-boot-marvell 4/9] pci: pci_mvebu: Inline mvebu_pcie_port_parse_dt() function Date: Tue, 21 Dec 2021 12:20:14 +0100 Message-Id: <20211221112019.15088-5-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211221112019.15088-1-pali@kernel.org> References: <20211221112019.15088-1-pali@kernel.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.38 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Function mvebu_pcie_port_parse_dt() is called only from mvebu_pcie_of_to_plat() function. Both these function parse DT properties required to setup mvebu pcie. So inline mvebu_pcie_port_parse_dt() function into mvebu_pcie_of_to_plat() to have all code related to parsing DT properties at one place. Signed-off-by: Pali Rohár --- drivers/pci/pci_mvebu.c | 27 +++++++++------------------ 1 file changed, 9 insertions(+), 18 deletions(-) diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c index eaaa6cbe326d..c47551807bc2 100644 --- a/drivers/pci/pci_mvebu.c +++ b/drivers/pci/pci_mvebu.c @@ -488,22 +488,6 @@ static int mvebu_pcie_probe(struct udevice *dev) return 0; } -static int mvebu_pcie_port_parse_dt(ofnode node, struct mvebu_pcie *pcie) -{ - const u32 *addr; - int len; - - addr = ofnode_get_property(node, "assigned-addresses", &len); - if (!addr) { - pr_err("property \"assigned-addresses\" not found"); - return -FDT_ERR_NOTFOUND; - } - - pcie->base = (void *)(fdt32_to_cpu(addr[2]) + SOC_REGS_PHY_BASE); - - return 0; -} - #define DT_FLAGS_TO_TYPE(flags) (((flags) >> 24) & 0x03) #define DT_TYPE_IO 0x1 #define DT_TYPE_MEM32 0x2 @@ -567,7 +551,9 @@ static int mvebu_get_tgt_attr(ofnode node, int devfn, static int mvebu_pcie_of_to_plat(struct udevice *dev) { struct mvebu_pcie *pcie = dev_get_plat(dev); + const u32 *addr; int ret = 0; + int len; /* Get port number, lane number and memory target / attr */ if (ofnode_read_u32(dev_ofnode(dev), "marvell,pcie-port", @@ -605,9 +591,14 @@ static int mvebu_pcie_of_to_plat(struct udevice *dev) } /* Parse PCIe controller register base from DT */ - ret = mvebu_pcie_port_parse_dt(dev_ofnode(dev), pcie); - if (ret < 0) + addr = ofnode_get_property(dev_ofnode(dev), "assigned-addresses", &len); + if (!addr) { + printf("%s: property \"assigned-addresses\" not found\n", pcie->name); + ret = -FDT_ERR_NOTFOUND; goto err; + } + + pcie->base = (void *)(fdt32_to_cpu(addr[2]) + SOC_REGS_PHY_BASE); return 0;