diff mbox series

[v2,10/16] arm: dts: ls1028a-rdb: sort nodes alphabetically

Message ID 20211207202023.2054282-11-vladimir.oltean@nxp.com
State Superseded
Delegated to: Priyanka Jain
Headers show
Series Sync NXP LS1028A-RDB device trees between U-Boot and Linux | expand

Commit Message

Vladimir Oltean Dec. 7, 2021, 8:20 p.m. UTC 
The nodes in the NXP LS1028A-RDB device tree are out of order, regroup
them alphabetically to have a simple delta when the Linux device tree is
brought in.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
---
 arch/arm/dts/fsl-ls1028a-rdb.dts | 110 +++++++++++++++----------------
 1 file changed, 55 insertions(+), 55 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm/dts/fsl-ls1028a-rdb.dts b/arch/arm/dts/fsl-ls1028a-rdb.dts
index ddb01db73f8e..11bf7e5f627d 100644
--- a/arch/arm/dts/fsl-ls1028a-rdb.dts
+++ b/arch/arm/dts/fsl-ls1028a-rdb.dts
@@ -36,6 +36,48 @@ 
 	status = "okay";
 };
 
+&duart0 {
+	status = "okay";
+};
+
+&duart1 {
+	status = "okay";
+};
+
+&enetc_mdio_pf3 {
+	status = "okay";
+	rdb_phy0: phy@2 {
+		reg = <2>;
+	};
+
+	/* VSC8514 QSGMII PHY */
+	sw_phy0: phy@10 {
+		reg = <0x10>;
+	};
+
+	sw_phy1: phy@11 {
+		reg = <0x11>;
+	};
+
+	sw_phy2: phy@12 {
+		reg = <0x12>;
+	};
+
+	sw_phy3: phy@13 {
+		reg = <0x13>;
+	};
+};
+
+&enetc_port0 {
+	status = "okay";
+	phy-mode = "sgmii";
+	phy-handle = <&rdb_phy0>;
+};
+
+&enetc_port2 {
+	status = "okay";
+};
+
 &esdhc {
 	status = "okay";
 };
@@ -110,44 +152,6 @@ 
 	status = "okay";
 };
 
-&sata {
-	status = "okay";
-};
-
-&duart0 {
-	status = "okay";
-};
-
-&duart1 {
-	status = "okay";
-};
-
-&pcie1 {
-	status = "okay";
-};
-
-&pcie2 {
-	status = "okay";
-};
-
-&usb0 {
-	status = "okay";
-};
-
-&usb1 {
-	status = "okay";
-};
-
-&enetc_port0 {
-	status = "okay";
-	phy-mode = "sgmii";
-	phy-handle = <&rdb_phy0>;
-};
-
-&enetc_port2 {
-	status = "okay";
-};
-
 &mscc_felix {
 	status = "okay";
 };
@@ -185,26 +189,22 @@ 
 	status = "okay";
 };
 
-&enetc_mdio_pf3 {
+&pcie1 {
 	status = "okay";
-	rdb_phy0: phy@2 {
-		reg = <2>;
-	};
+};
 
-	/* VSC8514 QSGMII PHY */
-	sw_phy0: phy@10 {
-		reg = <0x10>;
-	};
+&pcie2 {
+	status = "okay";
+};
 
-	sw_phy1: phy@11 {
-		reg = <0x11>;
-	};
+&sata {
+	status = "okay";
+};
 
-	sw_phy2: phy@12 {
-		reg = <0x12>;
-	};
+&usb0 {
+	status = "okay";
+};
 
-	sw_phy3: phy@13 {
-		reg = <0x13>;
-	};
+&usb1 {
+	status = "okay";
 };