diff mbox series

[u-boot-next,11/12] m68k: mcf5445x: pci: Use PCI_CONF1_ADDRESS() macro

Message ID 20211126104252.5443-12-pali@kernel.org
State Accepted
Commit c49f1fa8927340e7e3ea19f6ec6164510f9cd737
Delegated to: Tom Rini
Headers show
Series Common U-Boot macros for PCI Configuration Mechanism #1 | expand

Commit Message

Pali Rohár Nov. 26, 2021, 10:42 a.m. UTC
mcf5445x platform uses standard format of Config Address for PCI
Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS().

Signed-off-by: Pali Rohár <pali@kernel.org>
---
 arch/m68k/cpu/mcf5445x/pci.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

Comments

Simon Glass Dec. 28, 2021, 8:32 a.m. UTC | #1
On Fri, 26 Nov 2021 at 03:43, Pali Rohár <pali@kernel.org> wrote:
>
> mcf5445x platform uses standard format of Config Address for PCI
> Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS().
>
> Signed-off-by: Pali Rohár <pali@kernel.org>
> ---
>  arch/m68k/cpu/mcf5445x/pci.c | 7 +++----
>  1 file changed, 3 insertions(+), 4 deletions(-)
>

Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini Jan. 13, 2022, 1:52 a.m. UTC | #2
On Fri, Nov 26, 2021 at 11:42:51AM +0100, Pali Rohár wrote:

> mcf5445x platform uses standard format of Config Address for PCI
> Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS().
> 
> Signed-off-by: Pali Rohár <pali@kernel.org>
> Reviewed-by: Simon Glass <sjg@chromium.org>

Applied to u-boot/master, thanks!
diff mbox series

Patch

diff --git a/arch/m68k/cpu/mcf5445x/pci.c b/arch/m68k/cpu/mcf5445x/pci.c
index af02c4934c97..d487468d0bfa 100644
--- a/arch/m68k/cpu/mcf5445x/pci.c
+++ b/arch/m68k/cpu/mcf5445x/pci.c
@@ -26,12 +26,11 @@ 
 int pci_##rw##_cfg_##size(struct pci_controller *hose,			\
 	pci_dev_t dev, int offset, type val)				\
 {									\
-	u32 addr = 0;							\
-	u16 cfg_type = 0;						\
-	addr = ((offset & 0xfc) | cfg_type | (dev)  | 0x80000000);	\
+	u32 addr = PCI_CONF1_ADDRESS(PCI_BUS(dev), PCI_DEV(dev),	\
+				     PCI_FUNC(dev), offset);		\
 	out_be32(hose->cfg_addr, addr);					\
 	cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);	\
-	out_be32(hose->cfg_addr, addr & 0x7fffffff);			\
+	out_be32(hose->cfg_addr, addr & ~PCI_CONF1_ENABLE);		\
 	return 0;							\
 }