diff mbox series

[v5,14/26] arm: qemu-ppce500: Add a devicetree file

Message ID 20211026002344.405160-15-sjg@chromium.org
State Changes Requested
Delegated to: Tom Rini
Headers show
Series fdt: Make OF_BOARD a boolean option | expand

Commit Message

Simon Glass Oct. 26, 2021, 12:23 a.m. UTC 
Add a devicetree file obtained from qemu for this board. This was obtained
with:

   qemu-system-ppc64 -machine ppce500 -cpu e6500 -M dumpdtb=dtb.dtb

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 arch/powerpc/dts/Makefile         |   1 +
 arch/powerpc/dts/qemu-ppce500.dts | 264 ++++++++++++++++++++++++++++++
 configs/qemu-ppce500_defconfig    |   1 +
 3 files changed, 266 insertions(+)
 create mode 100644 arch/powerpc/dts/qemu-ppce500.dts
diff mbox series

Patch

diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
index ceaa8ce5c82..66d22ae8a45 100644
--- a/arch/powerpc/dts/Makefile
+++ b/arch/powerpc/dts/Makefile
@@ -18,6 +18,7 @@  dtb-$(CONFIG_TARGET_P2041RDB) += p2041rdb.dtb
 dtb-$(CONFIG_TARGET_P3041DS) += p3041ds.dtb
 dtb-$(CONFIG_TARGET_P4080DS) += p4080ds.dtb
 dtb-$(CONFIG_TARGET_P5040DS) += p5040ds.dtb
+dtb-$(CONFIG_TARGET_QEMU_PPCE500) += qemu-ppce500.dtb
 dtb-$(CONFIG_TARGET_SOCRATES) += socrates.dtb
 dtb-$(CONFIG_TARGET_T1024RDB) += t1024rdb.dtb
 dtb-$(CONFIG_TARGET_T1042D4RDB) += t1042d4rdb.dtb
diff --git a/arch/powerpc/dts/qemu-ppce500.dts b/arch/powerpc/dts/qemu-ppce500.dts
new file mode 100644
index 00000000000..92368e4d731
--- /dev/null
+++ b/arch/powerpc/dts/qemu-ppce500.dts
@@ -0,0 +1,264 @@ 
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Sample device tree for qemu-ppce400
+
+ * Copyright 2021 Google LLC
+ */
+/dts-v1/;
+
+/ {
+	compatible = "fsl,qemu-e500";
+	model = "QEMU ppce500";
+	#size-cells = <0x02>;
+	#address-cells = <0x02>;
+
+	platform@f00000000 {
+		interrupt-parent = <0x8003>;
+		ranges = <0x00 0x0f 0x00 0x8000000>;
+		#address-cells = <0x01>;
+		#size-cells = <0x01>;
+		compatible = "qemu,platform\0simple-bus";
+	};
+
+	pci@fe0008000 {
+		#address-cells = <0x03>;
+		#size-cells = <0x02>;
+		#interrupt-cells = <0x01>;
+		clock-frequency = <0x3f940aa>;
+		reg = <0x0f 0xe0008000 0x00 0x1000>;
+		ranges = <0x2000000 0x00 0xe0000000 0x0c
+			 0x00 0x00 0x20000000 0x1000000
+			 0x00 0x00 0x0f 0xe1000000
+			 0x00 0x10000>;
+		fsl,msi = <0x8004>;
+		bus-range = <0x00 0xff>;
+		interrupts = <0x18 0x02>;
+		interrupt-parent = <0x8003>;
+		interrupt-map = <0x800 0x00 0x00 0x01 0x8003 0x02 0x01 0x800
+			0x00 0x00 0x02 0x8003 0x03 0x01 0x800 0x00
+			0x00 0x03 0x8003 0x04 0x01 0x800 0x00 0x00
+			0x04 0x8003 0x01 0x01 0x1000 0x00 0x00 0x01
+			0x8003 0x03 0x01 0x1000 0x00 0x00 0x02 0x8003
+			0x04 0x01 0x1000 0x00 0x00 0x03 0x8003 0x01
+			0x01 0x1000 0x00 0x00 0x04 0x8003 0x02 0x01
+			0x1800 0x00 0x00 0x01 0x8003 0x04 0x01 0x1800
+			0x00 0x00 0x02 0x8003 0x01 0x01 0x1800 0x00
+			0x00 0x03 0x8003 0x02 0x01 0x1800 0x00 0x00
+			0x04 0x8003 0x03 0x01 0x2000 0x00 0x00 0x01
+			0x8003 0x01 0x01 0x2000 0x00 0x00 0x02 0x8003
+			0x02 0x01 0x2000 0x00 0x00 0x03 0x8003 0x03
+			0x01 0x2000 0x00 0x00 0x04 0x8003 0x04 0x01
+			0x2800 0x00 0x00 0x01 0x8003 0x02 0x01 0x2800
+			0x00 0x00 0x02 0x8003 0x03 0x01 0x2800 0x00
+			0x00 0x03 0x8003 0x04 0x01 0x2800 0x00 0x00
+			0x04 0x8003 0x01 0x01 0x3000 0x00 0x00 0x01
+			0x8003 0x03 0x01 0x3000 0x00 0x00 0x02 0x8003
+			0x04 0x01 0x3000 0x00 0x00 0x03 0x8003 0x01
+			0x01 0x3000 0x00 0x00 0x04 0x8003 0x02 0x01
+			0x3800 0x00 0x00 0x01 0x8003 0x04 0x01 0x3800
+			0x00 0x00 0x02 0x8003 0x01 0x01 0x3800 0x00
+			0x00 0x03 0x8003 0x02 0x01 0x3800 0x00 0x00
+			0x04 0x8003 0x03 0x01 0x4000 0x00 0x00 0x01
+			0x8003 0x01 0x01 0x4000 0x00 0x00 0x02 0x8003
+			0x02 0x01 0x4000 0x00 0x00 0x03 0x8003 0x03
+			0x01 0x4000 0x00 0x00 0x04 0x8003 0x04 0x01
+			0x4800 0x00 0x00 0x01 0x8003 0x02 0x01 0x4800
+			0x00 0x00 0x02 0x8003 0x03 0x01 0x4800 0x00
+			0x00 0x03 0x8003 0x04 0x01 0x4800 0x00 0x00
+			0x04 0x8003 0x01 0x01 0x5000 0x00 0x00 0x01
+			0x8003 0x03 0x01 0x5000 0x00 0x00 0x02 0x8003
+			0x04 0x01 0x5000 0x00 0x00 0x03 0x8003 0x01
+			0x01 0x5000 0x00 0x00 0x04 0x8003 0x02 0x01
+			0x5800 0x00 0x00 0x01 0x8003 0x04 0x01 0x5800
+			0x00 0x00 0x02 0x8003 0x01 0x01 0x5800 0x00
+			0x00 0x03 0x8003 0x02 0x01 0x5800 0x00 0x00
+			0x04 0x8003 0x03 0x01 0x6000 0x00 0x00 0x01
+			0x8003 0x01 0x01 0x6000 0x00 0x00 0x02 0x8003
+			0x02 0x01 0x6000 0x00 0x00 0x03 0x8003 0x03
+			0x01 0x6000 0x00 0x00 0x04 0x8003 0x04 0x01
+			0x6800 0x00 0x00 0x01 0x8003 0x02 0x01 0x6800
+			0x00 0x00 0x02 0x8003 0x03 0x01 0x6800 0x00
+			0x00 0x03 0x8003 0x04 0x01 0x6800 0x00 0x00
+			0x04 0x8003 0x01 0x01 0x7000 0x00 0x00 0x01
+			0x8003 0x03 0x01 0x7000 0x00 0x00 0x02 0x8003
+			0x04 0x01 0x7000 0x00 0x00 0x03 0x8003 0x01
+			0x01 0x7000 0x00 0x00 0x04 0x8003 0x02 0x01
+			0x7800 0x00 0x00 0x01 0x8003 0x04 0x01 0x7800
+			0x00 0x00 0x02 0x8003 0x01 0x01 0x7800 0x00
+			0x00 0x03 0x8003 0x02 0x01 0x7800 0x00 0x00
+			0x04 0x8003 0x03 0x01 0x8000 0x00 0x00 0x01
+			0x8003 0x01 0x01 0x8000 0x00 0x00 0x02 0x8003
+			0x02 0x01 0x8000 0x00 0x00 0x03 0x8003 0x03
+			0x01 0x8000 0x00 0x00 0x04 0x8003 0x04 0x01
+			0x8800 0x00 0x00 0x01 0x8003 0x02 0x01 0x8800
+			0x00 0x00 0x02 0x8003 0x03 0x01 0x8800 0x00
+			0x00 0x03 0x8003 0x04 0x01 0x8800 0x00 0x00
+			0x04 0x8003 0x01 0x01 0x9000 0x00 0x00 0x01
+			0x8003 0x03 0x01 0x9000 0x00 0x00 0x02 0x8003
+			0x04 0x01 0x9000 0x00 0x00 0x03 0x8003 0x01
+			0x01 0x9000 0x00 0x00 0x04 0x8003 0x02 0x01
+			0x9800 0x00 0x00 0x01 0x8003 0x04 0x01 0x9800
+			0x00 0x00 0x02 0x8003 0x01 0x01 0x9800 0x00
+			0x00 0x03 0x8003 0x02 0x01 0x9800 0x00 0x00
+			0x04 0x8003 0x03 0x01 0xa000 0x00 0x00 0x01
+			0x8003 0x01 0x01 0xa000 0x00 0x00 0x02 0x8003
+			0x02 0x01 0xa000 0x00 0x00 0x03 0x8003 0x03
+			0x01 0xa000 0x00 0x00 0x04 0x8003 0x04 0x01
+			0xa800 0x00 0x00 0x01 0x8003 0x02 0x01 0xa800
+			0x00 0x00 0x02 0x8003 0x03 0x01 0xa800 0x00
+			0x00 0x03 0x8003 0x04 0x01 0xa800 0x00 0x00
+			0x04 0x8003 0x01 0x01 0xb000 0x00 0x00 0x01
+			0x8003 0x03 0x01 0xb000 0x00 0x00 0x02 0x8003
+			0x04 0x01 0xb000 0x00 0x00 0x03 0x8003 0x01
+			0x01 0xb000 0x00 0x00 0x04 0x8003 0x02 0x01
+			0xb800 0x00 0x00 0x01 0x8003 0x04 0x01 0xb800
+			0x00 0x00 0x02 0x8003 0x01 0x01 0xb800 0x00
+			0x00 0x03 0x8003 0x02 0x01 0xb800 0x00 0x00
+			0x04 0x8003 0x03 0x01 0xc000 0x00 0x00 0x01
+			0x8003 0x01 0x01 0xc000 0x00 0x00 0x02 0x8003
+			0x02 0x01 0xc000 0x00 0x00 0x03 0x8003 0x03
+			0x01 0xc000 0x00 0x00 0x04 0x8003 0x04 0x01
+			0xc800 0x00 0x00 0x01 0x8003 0x02 0x01 0xc800
+			0x00 0x00 0x02 0x8003 0x03 0x01 0xc800 0x00
+			0x00 0x03 0x8003 0x04 0x01 0xc800 0x00 0x00
+			0x04 0x8003 0x01 0x01 0xd000 0x00 0x00 0x01
+			0x8003 0x03 0x01 0xd000 0x00 0x00 0x02 0x8003
+			0x04 0x01 0xd000 0x00 0x00 0x03 0x8003 0x01
+			0x01 0xd000 0x00 0x00 0x04 0x8003 0x02 0x01
+			0xd800 0x00 0x00 0x01 0x8003 0x04 0x01 0xd800
+			0x00 0x00 0x02 0x8003 0x01 0x01 0xd800 0x00
+			0x00 0x03 0x8003 0x02 0x01 0xd800 0x00 0x00
+			0x04 0x8003 0x03 0x01 0xe000 0x00 0x00 0x01
+			0x8003 0x01 0x01 0xe000 0x00 0x00 0x02 0x8003
+			0x02 0x01 0xe000 0x00 0x00 0x03 0x8003 0x03
+			0x01 0xe000 0x00 0x00 0x04 0x8003 0x04 0x01
+			0xe800 0x00 0x00 0x01 0x8003 0x02 0x01 0xe800
+			0x00 0x00 0x02 0x8003 0x03 0x01 0xe800 0x00
+			0x00 0x03 0x8003 0x04 0x01 0xe800 0x00 0x00
+			0x04 0x8003 0x01 0x01 0xf000 0x00 0x00 0x01
+			0x8003 0x03 0x01 0xf000 0x00 0x00 0x02 0x8003
+			0x04 0x01 0xf000 0x00 0x00 0x03 0x8003 0x01
+			0x01 0xf000 0x00 0x00 0x04 0x8003 0x02 0x01
+			0xf800 0x00 0x00 0x01 0x8003 0x04 0x01 0xf800
+			0x00 0x00 0x02 0x8003 0x01 0x01 0xf800 0x00
+			0x00 0x03 0x8003 0x02 0x01 0xf800 0x00 0x00
+			0x04 0x8003 0x03 0x01>;
+		interrupt-map-mask = <0xf800 0x00 0x00 0x07>;
+		device_type = "pci";
+		compatible = "fsl,mpc8540-pci";
+		cell-index = <0x00>;
+	};
+
+	soc@fe0000000 {
+		bus-frequency = <0x00>;
+		ranges = <0x00 0x0f 0xe0000000 0x100000>;
+		#size-cells = <0x01>;
+		#address-cells = <0x01>;
+		compatible = "fsl,mpc8544-immr\0simple-bus";
+		device_type = "soc";
+
+		power-off {
+			gpios = <0x8005 0x00 0x00>;
+			compatible = "gpio-poweroff";
+		};
+
+		gpio@ff000 {
+			linux,phandle = <0x8005>;
+			phandle = <0x8005>;
+			gpio-controller;
+			#gpio-cells = <0x02>;
+			interrupt-parent = <0x8003>;
+			interrupts = <0x2f 0x02>;
+			reg = <0xff000 0x1000>;
+			compatible = "fsl,qoriq-gpio";
+		};
+
+		msi@41600 {
+			linux,phandle = <0x8004>;
+			phandle = <0x8004>;
+			interrupts = <0xe0 0x00 0xe1 0x00 0xe2 0x00 0xe3 0x00
+				0xe4 0x00 0xe5 0x00 0xe6 0x00 0xe7 0x00>;
+			interrupt-parent = <0x8003>;
+			msi-available-ranges = <0x00 0x100>;
+			reg = <0x41600 0x200>;
+			compatible = "fsl,mpic-msi";
+		};
+
+		global-utilities@e0000 {
+			fsl,has-rstcr;
+			reg = <0xe0000 0x1000>;
+			compatible = "fsl,mpc8544-guts";
+		};
+
+		i2c@3000 {
+			interrupt-parent = <0x8003>;
+			interrupts = <0x2b 0x02>;
+			cell-index = <0x00>;
+			reg = <0x3000 0x14>;
+			compatible = "fsl-i2c";
+			device_type = "i2c";
+
+			rtc@68 {
+				reg = <0x68>;
+				compatible = "pericom,pt7c4338";
+			};
+		};
+
+		serial@4500 {
+			interrupt-parent = <0x8003>;
+			interrupts = <0x2a 0x02>;
+			clock-frequency = <0x17d78400>;
+			cell-index = <0x00>;
+			reg = <0x4500 0x100>;
+			compatible = "ns16550";
+			device_type = "serial";
+		};
+
+		pic@40000 {
+			interrupt-controller;
+			linux,phandle = <0x8003>;
+			phandle = <0x8003>;
+			#interrupt-cells = <0x02>;
+			#address-cells = <0x00>;
+			reg = <0x40000 0x40000>;
+			compatible = "fsl,mpic";
+			device_type = "open-pic";
+		};
+	};
+
+	aliases {
+		pci0 = "/pci@fe0008000";
+		rtc = "i2c/rtc@68";
+		i2c = "/soc@fe0000000/i2c@3000";
+		serial0 = "/soc@fe0000000/serial@4500";
+	};
+
+	cpus {
+		#size-cells = <0x00>;
+		#address-cells = <0x01>;
+
+		PowerPC,8544@0 {
+			status = "okay";
+			bus-frequency = <0x00>;
+			i-cache-size = <0x8000>;
+			d-cache-size = <0x8000>;
+			i-cache-line-size = <0x20>;
+			d-cache-line-size = <0x20>;
+			reg = <0x00>;
+			device_type = "cpu";
+			timebase-frequency = <0x17d78400>;
+			clock-frequency = <0x17d78400>;
+		};
+	};
+
+	chosen {
+		stdout-path = "/soc@fe0000000/serial@4500";
+		linux,stdout-path = "/soc@fe0000000/serial@4500";
+		bootargs = [00];
+	};
+
+	memory {
+		reg = <0x00 0x00 0x00 0x8000000>;
+		device_type = "memory";
+	};
+};
diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig
index 55f646537b2..5bf3e8de37a 100644
--- a/configs/qemu-ppce500_defconfig
+++ b/configs/qemu-ppce500_defconfig
@@ -1,6 +1,7 @@ 
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xf01000
 CONFIG_ENV_SIZE=0x2000
+CONFIG_DEFAULT_DEVICE_TREE="qemu-ppce500"
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_QEMU_PPCE500=y