Message ID | 20211020213134.7534-1-adelva@google.com |
---|---|
State | Accepted |
Commit | daf26a6bc29568fb4522cd63689906440785f28d |
Delegated to: | Bin Meng |
Headers | show |
Series | x86: chromebook_coral: fix C block comment | expand |
On Wed, 20 Oct 2021 at 15:31, Alistair Delva <adelva@google.com> wrote: > > Fix a warning seen when compiling this dts file. > > Signed-off-by: Alistair Delva <adelva@google.com> > Cc: Simon Glass <sjg@chromium.org> > Cc: Bin Meng <bmeng.cn@gmail.com> > --- > arch/x86/dts/chromebook_coral.dts | 1 + > 1 file changed, 1 insertion(+) Reviewed-by: Simon Glass <sjg@chromium.org> > diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts > index f0caaacfee..69a1c1ce29 100644 > --- a/arch/x86/dts/chromebook_coral.dts > +++ b/arch/x86/dts/chromebook_coral.dts > @@ -825,6 +825,7 @@ > * Refer to EDS-Vol2-22.3 > * [14:8] steps of delay for HS400, each 125ps > * [6:0] steps of delay for SDR104/HS200, each 125ps > + */ > > /* > * EMMC TX DATA Delay 2 > -- > 2.30.2 >
On Thu, Oct 21, 2021 at 5:31 AM Alistair Delva <adelva@google.com> wrote: > > Fix a warning seen when compiling this dts file. > > Signed-off-by: Alistair Delva <adelva@google.com> > Cc: Simon Glass <sjg@chromium.org> > Cc: Bin Meng <bmeng.cn@gmail.com> > --- > arch/x86/dts/chromebook_coral.dts | 1 + > 1 file changed, 1 insertion(+) > Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
On Wed, Oct 27, 2021 at 11:07 AM Bin Meng <bmeng.cn@gmail.com> wrote: > > On Thu, Oct 21, 2021 at 5:31 AM Alistair Delva <adelva@google.com> wrote: > > > > Fix a warning seen when compiling this dts file. > > > > Signed-off-by: Alistair Delva <adelva@google.com> > > Cc: Simon Glass <sjg@chromium.org> > > Cc: Bin Meng <bmeng.cn@gmail.com> > > --- > > arch/x86/dts/chromebook_coral.dts | 1 + > > 1 file changed, 1 insertion(+) > > > > Reviewed-by: Bin Meng <bmeng.cn@gmail.com> applied to u-boot-x86, thanks!
diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts index f0caaacfee..69a1c1ce29 100644 --- a/arch/x86/dts/chromebook_coral.dts +++ b/arch/x86/dts/chromebook_coral.dts @@ -825,6 +825,7 @@ * Refer to EDS-Vol2-22.3 * [14:8] steps of delay for HS400, each 125ps * [6:0] steps of delay for SDR104/HS200, each 125ps + */ /* * EMMC TX DATA Delay 2
Fix a warning seen when compiling this dts file. Signed-off-by: Alistair Delva <adelva@google.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> --- arch/x86/dts/chromebook_coral.dts | 1 + 1 file changed, 1 insertion(+)