| Message ID | 20211020024933.16964-9-chiawei_wang@aspeedtech.com |
|---|---|
| State | Superseded |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | aspeed: Support secure boot chain with FIT image verification | expand |
On Wed, 20 Oct 2021 at 02:50, Chia-Wei Wang <chiawei_wang@aspeedtech.com> wrote: > > Add ACRY DTS node and enable it for AST2600 EVB. > > Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Joel Stanley <joel@jms.id.au> > --- > arch/arm/dts/ast2600-evb.dts | 5 +++++ > arch/arm/dts/ast2600.dtsi | 9 +++++++++ > 2 files changed, 14 insertions(+) > > diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts > index adb80a30ef..05362d19bd 100644 > --- a/arch/arm/dts/ast2600-evb.dts > +++ b/arch/arm/dts/ast2600-evb.dts > @@ -182,3 +182,8 @@ > u-boot,dm-pre-reloc; > status = "okay"; > }; > + > +&acry { > + u-boot,dm-pre-reloc; > + status = "okay"; > +}; > diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi > index b8fe966c7d..31905fd208 100644 > --- a/arch/arm/dts/ast2600.dtsi > +++ b/arch/arm/dts/ast2600.dtsi > @@ -195,6 +195,15 @@ > status = "disabled"; > }; > > + acry: acry@1e6fa000 { > + compatible = "aspeed,ast2600-acry"; > + reg = <0x1e6fa000 0x1000>, > + <0x1e710000 0x10000>; > + interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&scu ASPEED_CLK_GATE_RSACLK>; > + status = "disabled"; > + }; > + > edac: sdram@1e6e0000 { > compatible = "aspeed,ast2600-sdram-edac"; > reg = <0x1e6e0000 0x174>; > -- > 2.17.1 >
diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts index adb80a30ef..05362d19bd 100644 --- a/arch/arm/dts/ast2600-evb.dts +++ b/arch/arm/dts/ast2600-evb.dts @@ -182,3 +182,8 @@ u-boot,dm-pre-reloc; status = "okay"; }; + +&acry { + u-boot,dm-pre-reloc; + status = "okay"; +}; diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi index b8fe966c7d..31905fd208 100644 --- a/arch/arm/dts/ast2600.dtsi +++ b/arch/arm/dts/ast2600.dtsi @@ -195,6 +195,15 @@ status = "disabled"; }; + acry: acry@1e6fa000 { + compatible = "aspeed,ast2600-acry"; + reg = <0x1e6fa000 0x1000>, + <0x1e710000 0x10000>; + interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&scu ASPEED_CLK_GATE_RSACLK>; + status = "disabled"; + }; + edac: sdram@1e6e0000 { compatible = "aspeed,ast2600-sdram-edac"; reg = <0x1e6e0000 0x174>;
Add ACRY DTS node and enable it for AST2600 EVB. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> --- arch/arm/dts/ast2600-evb.dts | 5 +++++ arch/arm/dts/ast2600.dtsi | 9 +++++++++ 2 files changed, 14 insertions(+)