| Message ID | 20211020024933.16964-3-chiawei_wang@aspeedtech.com |
|---|---|
| State | Superseded |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | aspeed: Support secure boot chain with FIT image verification | expand |
On Wed, 20 Oct 2021 at 02:49, Chia-Wei Wang <chiawei_wang@aspeedtech.com> wrote: > > The AST2600 SRAM has been extended to 88KB since A1 > chip revision. This patch updates the SRAM size to > offer more space for early stack/heap use. > > Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Joel Stanley <joel@jms.id.au> > --- > arch/arm/include/asm/arch-aspeed/platform.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/include/asm/arch-aspeed/platform.h b/arch/arm/include/asm/arch-aspeed/platform.h > index d50ec5f8a9..589abd4a3f 100644 > --- a/arch/arm/include/asm/arch-aspeed/platform.h > +++ b/arch/arm/include/asm/arch-aspeed/platform.h > @@ -17,7 +17,7 @@ > #define ASPEED_MAC_COUNT 4 > #define ASPEED_DRAM_BASE 0x80000000 > #define ASPEED_SRAM_BASE 0x10000000 > -#define ASPEED_SRAM_SIZE 0x10000 > +#define ASPEED_SRAM_SIZE 0x16000 > #else > #err "Unrecognized Aspeed platform." > #endif > -- > 2.17.1 >
diff --git a/arch/arm/include/asm/arch-aspeed/platform.h b/arch/arm/include/asm/arch-aspeed/platform.h index d50ec5f8a9..589abd4a3f 100644 --- a/arch/arm/include/asm/arch-aspeed/platform.h +++ b/arch/arm/include/asm/arch-aspeed/platform.h @@ -17,7 +17,7 @@ #define ASPEED_MAC_COUNT 4 #define ASPEED_DRAM_BASE 0x80000000 #define ASPEED_SRAM_BASE 0x10000000 -#define ASPEED_SRAM_SIZE 0x10000 +#define ASPEED_SRAM_SIZE 0x16000 #else #err "Unrecognized Aspeed platform." #endif
The AST2600 SRAM has been extended to 88KB since A1 chip revision. This patch updates the SRAM size to offer more space for early stack/heap use. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> --- arch/arm/include/asm/arch-aspeed/platform.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)