diff mbox series

[2/2] sunxi: fix non working console on uart2

Message ID 20211009121859.1384658-2-angelo.dureghello@timesys.com
State Accepted
Delegated to: Andre Przywara
Headers show
Series [1/2] sunxi: add H2+ config option | expand

Commit Message

Angelo Dureghello Oct. 9, 2021, 12:18 p.m. UTC
Fix non working console on uart2, that seems releated to both
Allwinner H2+ and H3.

Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>
---
 arch/arm/include/asm/arch-sunxi/gpio.h |  1 +
 arch/arm/mach-sunxi/board.c            | 10 +++++++++-
 2 files changed, 10 insertions(+), 1 deletion(-)

Comments

Andre Przywara Oct. 11, 2021, 12:19 a.m. UTC | #1
On Sat,  9 Oct 2021 14:18:59 +0200
Angelo Dureghello <angelo.dureghello@timesys.com> wrote:

Hi Angelo,

can you please mention the H3 in the subject line, so it's more obvious
that's it's only about one SoC?

> Fix non working console on uart2, that seems releated to both
> Allwinner H2+ and H3.
> 
> Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>
> ---
>  arch/arm/include/asm/arch-sunxi/gpio.h |  1 +
>  arch/arm/mach-sunxi/board.c            | 10 +++++++++-
>  2 files changed, 10 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
> index 2969a530ae..21fcfd5638 100644
> --- a/arch/arm/include/asm/arch-sunxi/gpio.h
> +++ b/arch/arm/include/asm/arch-sunxi/gpio.h
> @@ -150,6 +150,7 @@ enum sunxi_gpio_number {
>  #define SUN7I_GPA_GMAC		5
>  #define SUN6I_GPA_SDC2		5
>  #define SUN6I_GPA_SDC3		4
> +#define SUN8I_GPA_UART2         2
>  #define SUN8I_H3_GPA_UART0	2
>  
>  #define SUN4I_GPB_PWM		2
> diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
> index adb63e93e7..623da744e2 100644
> --- a/arch/arm/mach-sunxi/board.c
> +++ b/arch/arm/mach-sunxi/board.c
> @@ -145,10 +145,18 @@ static int gpio_init(void)
>  	sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1);
>  	sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1);
>  	sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP);
> -#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
> +#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) && \
> +	!defined(CONFIG_MACH_SUN8I_H2_PLUS) && \
> +	!defined(CONFIG_MACH_SUN8I_H3)
>  	sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_GPB_UART2);
>  	sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_GPB_UART2);
>  	sunxi_gpio_set_pull(SUNXI_GPB(1), SUNXI_GPIO_PULL_UP);
> +#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) && \

CONFIG_MACH_SUN8I is redundant if you use CONFIG_MACH_SUN8I_H3 below,
so drop the former. And if you rearrange this section to come before
the existing one above, the #elif will save you changes there.
Also please drop CONFIG_MACH_SUN8I_H2_PLUS.

But the actual gist of this patch (UART2 is on portA) is indeed
correct.

Cheers,
Andre

> +	(defined(CONFIG_MACH_SUN8I_H2_PLUS) || \
> +	 defined(CONFIG_MACH_SUN8I_H3))
> +	sunxi_gpio_set_cfgpin(SUNXI_GPA(0), SUN8I_GPA_UART2);
> +	sunxi_gpio_set_cfgpin(SUNXI_GPA(1), SUN8I_GPA_UART2);
> +	sunxi_gpio_set_pull(SUNXI_GPA(1), SUNXI_GPIO_PULL_UP);
>  #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
>  	sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL_R_UART);
>  	sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL_R_UART);
Andre Przywara April 5, 2022, 10:37 p.m. UTC | #2
On Sat,  9 Oct 2021 14:18:59 +0200
Angelo Dureghello <angelo.dureghello@timesys.com> wrote:

> Fix non working console on uart2, that seems releated to both
> Allwinner H2+ and H3.
> 
> Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>

Dropped CONFIG_MACH_SUN8I_H2_PLUS, reordered as suggested in the other
reply, and applied to sunxi/master.

Thanks!
Andre

> ---
>  arch/arm/include/asm/arch-sunxi/gpio.h |  1 +
>  arch/arm/mach-sunxi/board.c            | 10 +++++++++-
>  2 files changed, 10 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
> index 2969a530ae..21fcfd5638 100644
> --- a/arch/arm/include/asm/arch-sunxi/gpio.h
> +++ b/arch/arm/include/asm/arch-sunxi/gpio.h
> @@ -150,6 +150,7 @@ enum sunxi_gpio_number {
>  #define SUN7I_GPA_GMAC		5
>  #define SUN6I_GPA_SDC2		5
>  #define SUN6I_GPA_SDC3		4
> +#define SUN8I_GPA_UART2         2
>  #define SUN8I_H3_GPA_UART0	2
>  
>  #define SUN4I_GPB_PWM		2
> diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
> index adb63e93e7..623da744e2 100644
> --- a/arch/arm/mach-sunxi/board.c
> +++ b/arch/arm/mach-sunxi/board.c
> @@ -145,10 +145,18 @@ static int gpio_init(void)
>  	sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1);
>  	sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1);
>  	sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP);
> -#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
> +#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) && \
> +	!defined(CONFIG_MACH_SUN8I_H2_PLUS) && \
> +	!defined(CONFIG_MACH_SUN8I_H3)
>  	sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_GPB_UART2);
>  	sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_GPB_UART2);
>  	sunxi_gpio_set_pull(SUNXI_GPB(1), SUNXI_GPIO_PULL_UP);
> +#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) && \
> +	(defined(CONFIG_MACH_SUN8I_H2_PLUS) || \
> +	 defined(CONFIG_MACH_SUN8I_H3))
> +	sunxi_gpio_set_cfgpin(SUNXI_GPA(0), SUN8I_GPA_UART2);
> +	sunxi_gpio_set_cfgpin(SUNXI_GPA(1), SUN8I_GPA_UART2);
> +	sunxi_gpio_set_pull(SUNXI_GPA(1), SUNXI_GPIO_PULL_UP);
>  #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
>  	sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL_R_UART);
>  	sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL_R_UART);
diff mbox series

Patch

diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
index 2969a530ae..21fcfd5638 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -150,6 +150,7 @@  enum sunxi_gpio_number {
 #define SUN7I_GPA_GMAC		5
 #define SUN6I_GPA_SDC2		5
 #define SUN6I_GPA_SDC3		4
+#define SUN8I_GPA_UART2         2
 #define SUN8I_H3_GPA_UART0	2
 
 #define SUN4I_GPB_PWM		2
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index adb63e93e7..623da744e2 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -145,10 +145,18 @@  static int gpio_init(void)
 	sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1);
 	sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1);
 	sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP);
-#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
+#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) && \
+	!defined(CONFIG_MACH_SUN8I_H2_PLUS) && \
+	!defined(CONFIG_MACH_SUN8I_H3)
 	sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_GPB_UART2);
 	sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_GPB_UART2);
 	sunxi_gpio_set_pull(SUNXI_GPB(1), SUNXI_GPIO_PULL_UP);
+#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) && \
+	(defined(CONFIG_MACH_SUN8I_H2_PLUS) || \
+	 defined(CONFIG_MACH_SUN8I_H3))
+	sunxi_gpio_set_cfgpin(SUNXI_GPA(0), SUN8I_GPA_UART2);
+	sunxi_gpio_set_cfgpin(SUNXI_GPA(1), SUN8I_GPA_UART2);
+	sunxi_gpio_set_pull(SUNXI_GPA(1), SUNXI_GPIO_PULL_UP);
 #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
 	sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL_R_UART);
 	sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL_R_UART);