Message ID | 20210914032536.273530-5-marex@denx.de |
---|---|
State | Accepted |
Commit | 4527568e3f146ac7947c8cecaa5c546e5a2d0728 |
Delegated to: | Simon Goldschmidt |
Headers | show |
Series | [1/8] arm: socfpga: vining: Drop meaningless comment | expand |
> -----Original Message----- > From: Marek Vasut <marex@denx.de> > Sent: Tuesday, 14 September, 2021 11:26 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut <marex@denx.de>; Lim, Elly Siew Chin > <elly.siew.chin.lim@intel.com>; Simon Goldschmidt > <simon.k.r.goldschmidt@gmail.com>; Chee, Tien Fong > <tien.fong.chee@intel.com> > Subject: [PATCH 5/8] arm: socfpga: vining: Un-disable WDT in DT > > The WDT on this system should be enabled, make it so. > > Signed-off-by: Marek Vasut <marex@denx.de> > Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com> > Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> > Cc: Tien Fong Chee <tien.fong.chee@intel.com> > --- > arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi | 4 ---- > 1 file changed, 4 deletions(-) > Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com> Regards, TF
diff --git a/arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi b/arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi index 2e4468e8d80..9e8be282005 100644 --- a/arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi +++ b/arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi @@ -15,10 +15,6 @@ }; }; -&watchdog0 { - status = "disabled"; -}; - &mmc { status = "disabled"; };
The WDT on this system should be enabled, make it so. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> --- arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi | 4 ---- 1 file changed, 4 deletions(-)