| Message ID | 20210911224318.99111-1-marex@denx.de |
|---|---|
| State | Accepted |
| Commit | af2d3c91d8772e3d0eacef45a3bac8a4cbdb60ae |
| Delegated to: | Stefano Babic |
| Headers | show |
| Series | ARM: dts: imx8mm-verdin: Set PHY mode to RGMII-ID | expand |
Hi Marek On Sun, 2021-09-12 at 00:43 +0200, Marek Vasut wrote: > Since c6df0e2ffdc ("net: phy: micrel: add support for DLL setup on ksz9131") > the Micrel PHY driver correctly configures the delay register. The Verdin PHY > is RGMII-ID, so reflect that in DT, otherwise the ethernet no longer works. Yes, however, one should also get rid of the proprietary PHY setup in our board setup. Remember, I already did send this as part of my target refresh series: https://marc.info/?l=u-boot&m=162990456210415 > Signed-off-by: Marek Vasut <marex@denx.de> > Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> > Cc: Max Krummenacher <max.krummenacher@toradex.com> > Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> > --- > arch/arm/dts/imx8mm-verdin.dts | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/dts/imx8mm-verdin.dts b/arch/arm/dts/imx8mm-verdin.dts > index fb0756d6e19..ac2a4b69d3c 100644 > --- a/arch/arm/dts/imx8mm-verdin.dts > +++ b/arch/arm/dts/imx8mm-verdin.dts > @@ -160,7 +160,7 @@ > &fec1 { > fsl,magic-packet; > phy-handle = <ðphy0>; > - phy-mode = "rgmii"; > + phy-mode = "rgmii-id"; > phy-supply = <®_ethphy>; > pinctrl-names = "default", "sleep"; > pinctrl-0 = <&pinctrl_fec1>; Cheers Marcel
On 9/12/21 12:53 AM, Marcel Ziswiler wrote: > Hi Marek > > On Sun, 2021-09-12 at 00:43 +0200, Marek Vasut wrote: >> Since c6df0e2ffdc ("net: phy: micrel: add support for DLL setup on ksz9131") >> the Micrel PHY driver correctly configures the delay register. The Verdin PHY >> is RGMII-ID, so reflect that in DT, otherwise the ethernet no longer works. > > Yes, however, one should also get rid of the proprietary PHY setup in our board setup. > > Remember, I already did send this as part of my target refresh series: > > https://marc.info/?l=u-boot&m=162990456210415 ACK, that patch of yours is a better patch too.
> Since c6df0e2ffdc ("net: phy: micrel: add support for DLL setup on ksz9131") > the Micrel PHY driver correctly configures the delay register. The Verdin PHY > is RGMII-ID, so reflect that in DT, otherwise the ethernet no longer works. > Signed-off-by: Marek Vasut <marex@denx.de> > Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> > Cc: Max Krummenacher <max.krummenacher@toradex.com> > Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic
On Thu, 2021-10-07 at 16:12 +0200, sbabic@denx.de wrote: > > Since c6df0e2ffdc ("net: phy: micrel: add support for DLL setup on ksz9131") > > the Micrel PHY driver correctly configures the delay register. The Verdin PHY > > is RGMII-ID, so reflect that in DT, otherwise the ethernet no longer works. > > Signed-off-by: Marek Vasut <marex@denx.de> > > Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> > > Cc: Max Krummenacher <max.krummenacher@toradex.com> > > Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> > Applied to u-boot-imx, master, thanks ! No, remember, you should not have picked that one but rather my patch series instead! > Best regards, > Stefano Babic
On Thu, 2021-10-07 at 23:56 +0000, Marcel Ziswiler wrote: > On Thu, 2021-10-07 at 16:12 +0200, sbabic@denx.de wrote: > > > Since c6df0e2ffdc ("net: phy: micrel: add support for DLL setup on ksz9131") > > > the Micrel PHY driver correctly configures the delay register. The Verdin PHY > > > is RGMII-ID, so reflect that in DT, otherwise the ethernet no longer works. > > > Signed-off-by: Marek Vasut <marex@denx.de> > > > Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> > > > Cc: Max Krummenacher <max.krummenacher@toradex.com> > > > Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> > > Applied to u-boot-imx, master, thanks ! > > No, remember, you should not have picked that one but rather my patch series instead! Okay, let me send a v5 of my patch series re-based on top of this now with another fixes tag (;-p). > > Best regards, > > Stefano Babic
On 10/8/21 2:13 AM, Marcel Ziswiler wrote: > On Thu, 2021-10-07 at 23:56 +0000, Marcel Ziswiler wrote: >> On Thu, 2021-10-07 at 16:12 +0200, sbabic@denx.de wrote: >>>> Since c6df0e2ffdc ("net: phy: micrel: add support for DLL setup on ksz9131") >>>> the Micrel PHY driver correctly configures the delay register. The Verdin PHY >>>> is RGMII-ID, so reflect that in DT, otherwise the ethernet no longer works. >>>> Signed-off-by: Marek Vasut <marex@denx.de> >>>> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> >>>> Cc: Max Krummenacher <max.krummenacher@toradex.com> >>>> Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> >>> Applied to u-boot-imx, master, thanks ! >> >> No, remember, you should not have picked that one but rather my patch series instead! > > Okay, let me send a v5 of my patch series re-based on top of this now with another fixes tag (;-p). Ah sigh, thanks.
diff --git a/arch/arm/dts/imx8mm-verdin.dts b/arch/arm/dts/imx8mm-verdin.dts index fb0756d6e19..ac2a4b69d3c 100644 --- a/arch/arm/dts/imx8mm-verdin.dts +++ b/arch/arm/dts/imx8mm-verdin.dts @@ -160,7 +160,7 @@ &fec1 { fsl,magic-packet; phy-handle = <ðphy0>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-supply = <®_ethphy>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&pinctrl_fec1>;
Since c6df0e2ffdc ("net: phy: micrel: add support for DLL setup on ksz9131") the Micrel PHY driver correctly configures the delay register. The Verdin PHY is RGMII-ID, so reflect that in DT, otherwise the ethernet no longer works. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Max Krummenacher <max.krummenacher@toradex.com> Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> --- arch/arm/dts/imx8mm-verdin.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)