diff mbox series

[v6,06/17] arm: socfpga: Get clock manager base address for Intel N5X device

Message ID 20210810032642.65792-7-elly.siew.chin.lim@intel.com
State Accepted
Commit d694c7d46b052b8186be99876ba30cc1e469a01b
Delegated to: Simon Goldschmidt
Headers show
Series Add Intel N5X SoC support | expand

Commit Message

Siew Chin Lim Aug. 10, 2021, 3:26 a.m. UTC
Add N5X clock manager to socfpga_get_managers_addr function.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
---
 arch/arm/mach-socfpga/misc.c | 3 +++
 1 file changed, 3 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index f8d3d48ee8..9c19157de7 100644
--- a/arch/arm/mach-socfpga/misc.c
+++ b/arch/arm/mach-socfpga/misc.c
@@ -254,6 +254,9 @@  void socfpga_get_managers_addr(void)
 #ifdef CONFIG_TARGET_SOCFPGA_AGILEX
 	ret = socfpga_get_base_addr("intel,agilex-clkmgr",
 				    &socfpga_clkmgr_base);
+#elif IS_ENABLED(CONFIG_TARGET_SOCFPGA_N5X)
+	ret = socfpga_get_base_addr("intel,n5x-clkmgr",
+				    &socfpga_clkmgr_base);
 #else
 	ret = socfpga_get_base_addr("altr,clk-mgr", &socfpga_clkmgr_base);
 #endif