[v2,6/6] riscv: lib: modify the indent

Message ID	20210803044444.14032-7-zong.li@sifive.com
State	Superseded
Delegated to:	Andes
Headers	show Return-Path: <u-boot-bounces@lists.denx.de> From: Zong Li <zong.li@sifive.com> To: rick@andestech.com, ycliang@andestech.com, bmeng.cn@gmail.com, seanga2@gmail.com, green.wan@sifive.com, paul.walmsley@sifive.com, sjg@chromium.org, u-boot@lists.denx.de Cc: Zong Li <zong.li@sifive.com> Subject: [PATCH v2 6/6] riscv: lib: modify the indent Date: Tue, 3 Aug 2021 12:44:44 +0800 Message-Id: <20210803044444.14032-7-zong.li@sifive.com> In-Reply-To: <20210803044444.14032-1-zong.li@sifive.com> References: <20210803044444.14032-1-zong.li@sifive.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: list Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" <u-boot-bounces@lists.denx.de>
Series	Support SiFive Composable cache driver \| expand [v2,0/6] Support SiFive Composable cache driver [v2,1/6] cache: add sifive composable cache driver [v2,2/6] board: sifive: use ccache driver instead of helper function [v2,3/6] riscv: lib: introduce cache_init interface [v2,4/6] riscv: sifive: use common cache_init instead of duplicated implementation [v2,5/6] riscv: lib: move platform-related libraries to sperate folder [v2,6/6] riscv: lib: modify the indent

Message ID

20210803044444.14032-7-zong.li@sifive.com

State

Superseded

Delegated to:

Andes

Headers

From: Zong Li <zong.li@sifive.com>
To: rick@andestech.com, ycliang@andestech.com, bmeng.cn@gmail.com,
 seanga2@gmail.com, green.wan@sifive.com, paul.walmsley@sifive.com,
 sjg@chromium.org, u-boot@lists.denx.de
Cc: Zong Li <zong.li@sifive.com>
Subject: [PATCH v2 6/6] riscv: lib: modify the indent
Date: Tue,  3 Aug 2021 12:44:44 +0800
Message-Id: <20210803044444.14032-7-zong.li@sifive.com>
In-Reply-To: <20210803044444.14032-1-zong.li@sifive.com>
References: <20210803044444.14032-1-zong.li@sifive.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Precedence: list
Errors-To: u-boot-bounces@lists.denx.de
Sender: "U-Boot" <u-boot-bounces@lists.denx.de>

Series

Support SiFive Composable cache driver | expand

We usually use a space in function declaration, rather than a tab. Signed-off-by: Zong Li <zong.li@sifive.com> --- arch/riscv/include/asm/cache.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Sean Anderson Aug. 10, 2021, 4:55 a.m. UTC | #1

On 8/3/21 12:44 AM, Zong Li wrote:
> We usually use a space in function declaration, rather than a tab.
> 
> Signed-off-by: Zong Li <zong.li@sifive.com>
> ---
>   arch/riscv/include/asm/cache.h | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/riscv/include/asm/cache.h b/arch/riscv/include/asm/cache.h
> index 6ebb2b4329..b700ff5021 100644
> --- a/arch/riscv/include/asm/cache.h
> +++ b/arch/riscv/include/asm/cache.h
> @@ -8,7 +8,7 @@
>   #define _ASM_RISCV_CACHE_H
>   
>   /* cache */
> -void	cache_flush(void);
> +void cache_flush(void);
>   int cache_init(void);
>   
>   /*
> 

Reviewed-by: Sean Anderson <seanga2@gmail.com>

diff --git a/arch/riscv/include/asm/cache.h b/arch/riscv/include/asm/cache.h
index 6ebb2b4329..b700ff5021 100644
--- a/arch/riscv/include/asm/cache.h
+++ b/arch/riscv/include/asm/cache.h
@@ -8,7 +8,7 @@ 
 #define _ASM_RISCV_CACHE_H
 
 /* cache */
-void	cache_flush(void);
+void cache_flush(void);
 int cache_init(void);
 
 /*

[v2,6/6] riscv: lib: modify the indent

Commit Message

Comments

Patch