From patchwork Thu Jul 15 15:39:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 1505768 X-Patchwork-Delegate: hs@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GQdqY5zLCz9sPf for ; Fri, 16 Jul 2021 01:40:23 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D3F0381FC6; Thu, 15 Jul 2021 17:40:14 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=collabora.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id A8DD282999; Thu, 15 Jul 2021 17:40:11 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_PASS, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.2 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e3e3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 5C7F081E47 for ; Thu, 15 Jul 2021 17:40:08 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sebastian.reichel@collabora.com Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: sre) with ESMTPSA id DF2631F42024 Received: by jupiter.universe (Postfix, from userid 1000) id D3B654800C7; Thu, 15 Jul 2021 17:40:04 +0200 (CEST) From: Sebastian Reichel To: Sebastian Reichel , u-boot@lists.denx.de Cc: Simon Glass , Tom Rini Subject: [PATCHv2 1/2] i2c: add dm_i2c_reg_clrset Date: Thu, 15 Jul 2021 17:39:59 +0200 Message-Id: <20210715154000.92119-2-sebastian.reichel@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210715154000.92119-1-sebastian.reichel@collabora.com> References: <20210715154000.92119-1-sebastian.reichel@collabora.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Add function to apply a bitmask to an i2c register, so that specific bits can be cleared and/or set. Suggested-by: Simon Glass Signed-off-by: Sebastian Reichel Reviewed-by: Simon Glass --- drivers/i2c/i2c-uclass.c | 15 +++++++++++++++ include/i2c.h | 14 ++++++++++++++ test/dm/i2c.c | 29 +++++++++++++++++++++++++++++ 3 files changed, 58 insertions(+) diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c index be56785217c3..8adcdaf86411 100644 --- a/drivers/i2c/i2c-uclass.c +++ b/drivers/i2c/i2c-uclass.c @@ -245,6 +245,21 @@ int dm_i2c_reg_write(struct udevice *dev, uint offset, uint value) return dm_i2c_write(dev, offset, &val, 1); } +int dm_i2c_reg_clrset(struct udevice *dev, uint offset, u32 clr, u32 set) +{ + uint8_t val; + int ret; + + ret = dm_i2c_read(dev, offset, &val, 1); + if (ret < 0) + return ret; + + val &= ~clr; + val |= set; + + return dm_i2c_write(dev, offset, &val, 1); +} + /** * i2c_probe_chip() - probe for a chip on a bus * diff --git a/include/i2c.h b/include/i2c.h index c0fe94c1f333..4fa2222a15ae 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -242,6 +242,20 @@ int dm_i2c_reg_read(struct udevice *dev, uint offset); */ int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val); +/** + * dm_i2c_reg_clrset() - Apply bitmask to an I2C register + * + * Read value, apply bitmask and write modified value back to the + * given address in an I2C chip + * + * @dev: Device to use for transfer + * @offset: Address for the R/W operation + * @clr: Bitmask of bits that should be cleared + * @set: Bitmask of bits that should be set + * @return 0 on success, -ve on error + */ +int dm_i2c_reg_clrset(struct udevice *dev, uint offset, u32 clr, u32 set); + /** * dm_i2c_xfer() - Transfer messages over I2C * diff --git a/test/dm/i2c.c b/test/dm/i2c.c index d74f5f9fbc7c..74b209719560 100644 --- a/test/dm/i2c.c +++ b/test/dm/i2c.c @@ -304,3 +304,32 @@ static int dm_test_i2c_addr_offset(struct unit_test_state *uts) } DM_TEST(dm_test_i2c_addr_offset, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + +static int dm_test_i2c_reg_clrset(struct unit_test_state *uts) +{ + struct udevice *eeprom; + struct udevice *dev; + u8 buf[5]; + + ut_assertok(i2c_get_chip_for_busnum(busnum, chip, 1, &dev)); + + /* Do a transfer so we can find the emulator */ + ut_assertok(dm_i2c_read(dev, 0, buf, 5)); + ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom)); + + /* Dummy data for the test */ + ut_assertok(dm_i2c_write(dev, 0, "\xff\x00\xff\x00\x10", 5)); + + /* Do some clrset tests */ + ut_assertok(dm_i2c_reg_clrset(dev, 0, 0xff, 0x10)); + ut_assertok(dm_i2c_reg_clrset(dev, 1, 0x00, 0x11)); + ut_assertok(dm_i2c_reg_clrset(dev, 2, 0xed, 0x00)); + ut_assertok(dm_i2c_reg_clrset(dev, 3, 0xff, 0x13)); + ut_assertok(dm_i2c_reg_clrset(dev, 4, 0x00, 0x14)); + + ut_assertok(dm_i2c_read(dev, 0, buf, 5)); + ut_asserteq_mem("\x10\x11\x12\x13\x14", buf, sizeof(buf)); + + return 0; +} +DM_TEST(dm_test_i2c_reg_clrset, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);