diff mbox series

[10/14] ARM: dts: ast2600: Add ARCY to device tree

Message ID 20210713090016.2729-11-chiawei_wang@aspeedtech.com
State Superseded
Delegated to: Tom Rini
Headers show
Series aspeed: Support secure boot chain with FIT image verification | expand

Commit Message

ChiaWei Wang July 13, 2021, 9 a.m. UTC 
Add ARCY DTS node and enable it for AST2600 EVB.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
---
 arch/arm/dts/ast2600-evb.dts | 5 +++++
 arch/arm/dts/ast2600.dtsi    | 9 +++++++++
 2 files changed, 14 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts
index adb80a30ef..fd4e35e954 100644
--- a/arch/arm/dts/ast2600-evb.dts
+++ b/arch/arm/dts/ast2600-evb.dts
@@ -182,3 +182,8 @@ 
 	u-boot,dm-pre-reloc;
 	status = "okay";
 };
+
+&arcy {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi
index 642206fb77..216156bfbb 100644
--- a/arch/arm/dts/ast2600.dtsi
+++ b/arch/arm/dts/ast2600.dtsi
@@ -195,6 +195,15 @@ 
 			status = "disabled";
 		};
 
+		arcy: arcy@1e6fa000 {
+			compatible = "aspeed,ast2600-arcy";
+			reg = <0x1e6fa000 0x1000>,
+			      <0x1e710000 0x10000>;
+			interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&scu ASPEED_CLK_GATE_RSACLK>;
+			status = "disabled";
+		};
+
 		edac: sdram@1e6e0000 {
 			compatible = "aspeed,ast2600-sdram-edac";
 			reg = <0x1e6e0000 0x174>;