| Message ID | 20210712094921.16950-7-elly.siew.chin.lim@intel.com |
|---|---|
| State | Superseded |
| Delegated to: | Simon Goldschmidt |
| Headers | show |
| Series | Add Intel N5X SoC support | expand |
diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index 64a7c9d652..9305bec38a 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -254,6 +254,9 @@ void socfpga_get_managers_addr(void) #ifdef CONFIG_TARGET_SOCFPGA_AGILEX ret = socfpga_get_base_addr("intel,agilex-clkmgr", &socfpga_clkmgr_base); +#elif IS_ENABLED(CONFIG_TARGET_SOCFPGA_N5X) + ret = socfpga_get_base_addr("intel,n5x-clkmgr", + &socfpga_clkmgr_base); #else ret = socfpga_get_base_addr("altr,clk-mgr", &socfpga_clkmgr_base); #endif
Add N5X clock manager to socfpga_get_managers_addr function. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com> --- arch/arm/mach-socfpga/misc.c | 3 +++ 1 file changed, 3 insertions(+)