From patchwork Tue Jun 22 06:34:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lokesh Vutla X-Patchwork-Id: 1495464 X-Patchwork-Delegate: lokeshvutla@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=L6vdhSMx; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4G8GqK2tMgz9sXk for ; Tue, 22 Jun 2021 16:35:24 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id DAA9C829C3; Tue, 22 Jun 2021 08:34:55 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="L6vdhSMx"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 89B70829C0; Tue, 22 Jun 2021 08:34:49 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 95FCB829A6 for ; Tue, 22 Jun 2021 08:34:41 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=lokeshvutla@ti.com Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 15M6YebN054933 for ; Tue, 22 Jun 2021 01:34:40 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1624343680; bh=bLjCkOFyZuRLrIIUN/o0nl/fNqMKXtkzD1umr2eqftU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=L6vdhSMx6YFkoNo4R+Ud3NhzWmy33hJMcFxWnUUdxZs6lubSYwiEfeQnSov7Enmcd RN+ZptTJSlZezGK2DcKD1peeFZ9WxPPvMyWQHZRf4pDk7h23y/haHeetcTgfZesG48 uZZ8EeSHMjrbgJVOqwLqI3IqF6TQQWbsJI6thG+Q= Received: from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 15M6YeXx070076 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL) for ; Tue, 22 Jun 2021 01:34:40 -0500 Received: from DLEE114.ent.ti.com (157.170.170.25) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Tue, 22 Jun 2021 01:34:40 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Tue, 22 Jun 2021 01:34:40 -0500 Received: from lokesh-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 15M6YVGC066559; Tue, 22 Jun 2021 01:34:38 -0500 From: Lokesh Vutla To: CC: Lokesh Vutla , Keerthy , Suman Anna Subject: [PATCH v2 3/5] arm: dts: k3-am654-base-board: Add r5 specific u-boot dtsi Date: Tue, 22 Jun 2021 12:04:29 +0530 Message-ID: <20210622063431.3151-4-lokeshvutla@ti.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210622063431.3151-1-lokeshvutla@ti.com> References: <20210622063431.3151-1-lokeshvutla@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean So far all the u-boot specific properties for both r5 and a53 are placed in k3-am654-base-board-u-boot.dtsi. But there are few a53 nodes that should be updated but doesn't belong to r5. So create a separate r5 specific u-boot dtsi. Signed-off-by: Lokesh Vutla --- arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 191 +---------------- .../dts/k3-am654-r5-base-board-u-boot.dtsi | 193 ++++++++++++++++++ arch/arm/dts/k3-am654-r5-base-board.dts | 2 - 3 files changed, 195 insertions(+), 191 deletions(-) create mode 100644 arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi index b0602d1dad..77b7d3f452 100644 --- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi +++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi @@ -1,193 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018-2021 Texas Instruments Incorporated - http://www.ti.com/ */ -#include -#include - -/ { - chosen { - stdout-path = "serial2:115200n8"; - }; - - aliases { - serial2 = &main_uart0; - ethernet0 = &cpsw_port1; - usb0 = &usb0; - usb1 = &usb1; - spi0 = &ospi0; - spi1 = &ospi1; - }; -}; - -&cbass_main{ - u-boot,dm-spl; - main-navss { - u-boot,dm-spl; - }; -}; - -&cbass_mcu { - u-boot,dm-spl; - - mcu-navss { - u-boot,dm-spl; - - ringacc@2b800000 { - u-boot,dm-spl; - ti,dma-ring-reset-quirk; - }; - - dma-controller@285c0000 { - u-boot,dm-spl; - }; - }; -}; - -&cbass_wakeup { - u-boot,dm-spl; - - chipid@43000014 { - u-boot,dm-spl; - }; -}; - -&secure_proxy_main { - u-boot,dm-spl; -}; - -&dmsc { - u-boot,dm-spl; - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; - u-boot,dm-spl; - }; -}; - -&k3_pds { - u-boot,dm-spl; -}; - -&k3_clks { - u-boot,dm-spl; -}; - -&k3_reset { - u-boot,dm-spl; -}; - -&wkup_pmx0 { - u-boot,dm-spl; - - wkup_i2c0_pins_default { - u-boot,dm-spl; - }; -}; - -&main_pmx0 { - u-boot,dm-spl; - usb0_pins_default: usb0_pins_default { - pinctrl-single,pins = < - AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */ - >; - u-boot,dm-spl; - }; -}; - -&main_uart0_pins_default { - u-boot,dm-spl; -}; - -&main_pmx1 { - u-boot,dm-spl; -}; - -&wkup_pmx0 { - mcu-fss0-ospi0-pins-default { - u-boot,dm-spl; - }; -}; - -&main_uart0 { - u-boot,dm-spl; -}; - -&main_mmc0_pins_default { - u-boot,dm-spl; -}; - -&main_mmc1_pins_default { - u-boot,dm-spl; -}; - -&sdhci0 { - u-boot,dm-spl; -}; - -&sdhci1 { - u-boot,dm-spl; -}; - -&davinci_mdio { - phy0: ethernet-phy@0 { - reg = <0>; - /* TODO: phy reset: TCA9555RTWR(i2c:0x21)[p04].GPIO_MCU_RGMII_RSTN */ - ti,rx-internal-delay = ; - ti,fifo-depth = ; - }; -}; - -&mcu_cpsw { - reg = <0x0 0x46000000 0x0 0x200000>, - <0x0 0x40f00200 0x0 0x2>; - reg-names = "cpsw_nuss", "mac_efuse"; - /delete-property/ ranges; - - cpsw-phy-sel@40f04040 { - compatible = "ti,am654-cpsw-phy-sel"; - reg= <0x0 0x40f04040 0x0 0x4>; - reg-names = "gmii-sel"; - }; -}; - -&wkup_i2c0 { - u-boot,dm-spl; -}; - -&usb1 { - dr_mode = "peripheral"; -}; - -&fss { - u-boot,dm-spl; -}; - -&ospi0 { - u-boot,dm-spl; - - flash@0{ - u-boot,dm-spl; - }; -}; - -&dwc3_0 { - status = "okay"; - u-boot,dm-spl; -}; - -&usb0_phy { - status = "okay"; - u-boot,dm-spl; -}; - -&usb0 { - pinctrl-names = "default"; - pinctrl-0 = <&usb0_pins_default>; - dr_mode = "host"; - u-boot,dm-spl; -}; - -&scm_conf { - u-boot,dm-spl; -}; +#include "k3-am654-r5-base-board-u-boot.dtsi" diff --git a/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi new file mode 100644 index 0000000000..932a65b906 --- /dev/null +++ b/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi @@ -0,0 +1,193 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated - http://www.ti.com/ + */ + +#include +#include + +/ { + chosen { + stdout-path = "serial2:115200n8"; + }; + + aliases { + serial2 = &main_uart0; + ethernet0 = &cpsw_port1; + usb0 = &usb0; + usb1 = &usb1; + spi0 = &ospi0; + spi1 = &ospi1; + }; +}; + +&cbass_main{ + u-boot,dm-spl; + main-navss { + u-boot,dm-spl; + }; +}; + +&cbass_mcu { + u-boot,dm-spl; + + mcu-navss { + u-boot,dm-spl; + + ringacc@2b800000 { + u-boot,dm-spl; + ti,dma-ring-reset-quirk; + }; + + dma-controller@285c0000 { + u-boot,dm-spl; + }; + }; +}; + +&cbass_wakeup { + u-boot,dm-spl; + + chipid@43000014 { + u-boot,dm-spl; + }; +}; + +&secure_proxy_main { + u-boot,dm-spl; +}; + +&dmsc { + u-boot,dm-spl; + k3_sysreset: sysreset-controller { + compatible = "ti,sci-sysreset"; + u-boot,dm-spl; + }; +}; + +&k3_pds { + u-boot,dm-spl; +}; + +&k3_clks { + u-boot,dm-spl; +}; + +&k3_reset { + u-boot,dm-spl; +}; + +&wkup_pmx0 { + u-boot,dm-spl; + + wkup_i2c0_pins_default { + u-boot,dm-spl; + }; +}; + +&main_pmx0 { + u-boot,dm-spl; + usb0_pins_default: usb0_pins_default { + pinctrl-single,pins = < + AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */ + >; + u-boot,dm-spl; + }; +}; + +&main_uart0_pins_default { + u-boot,dm-spl; +}; + +&main_pmx1 { + u-boot,dm-spl; +}; + +&wkup_pmx0 { + mcu-fss0-ospi0-pins-default { + u-boot,dm-spl; + }; +}; + +&main_uart0 { + u-boot,dm-spl; +}; + +&main_mmc0_pins_default { + u-boot,dm-spl; +}; + +&main_mmc1_pins_default { + u-boot,dm-spl; +}; + +&sdhci0 { + u-boot,dm-spl; +}; + +&sdhci1 { + u-boot,dm-spl; +}; + +&davinci_mdio { + phy0: ethernet-phy@0 { + reg = <0>; + /* TODO: phy reset: TCA9555RTWR(i2c:0x21)[p04].GPIO_MCU_RGMII_RSTN */ + ti,rx-internal-delay = ; + ti,fifo-depth = ; + }; +}; + +&mcu_cpsw { + reg = <0x0 0x46000000 0x0 0x200000>, + <0x0 0x40f00200 0x0 0x2>; + reg-names = "cpsw_nuss", "mac_efuse"; + /delete-property/ ranges; + + cpsw-phy-sel@40f04040 { + compatible = "ti,am654-cpsw-phy-sel"; + reg= <0x0 0x40f04040 0x0 0x4>; + reg-names = "gmii-sel"; + }; +}; + +&wkup_i2c0 { + u-boot,dm-spl; +}; + +&usb1 { + dr_mode = "peripheral"; +}; + +&fss { + u-boot,dm-spl; +}; + +&ospi0 { + u-boot,dm-spl; + + flash@0{ + u-boot,dm-spl; + }; +}; + +&dwc3_0 { + status = "okay"; + u-boot,dm-spl; +}; + +&usb0_phy { + status = "okay"; + u-boot,dm-spl; +}; + +&usb0 { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_pins_default>; + dr_mode = "host"; + u-boot,dm-spl; +}; + +&scm_conf { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts b/arch/arm/dts/k3-am654-r5-base-board.dts index 087a3bb3d0..24881c86f2 100644 --- a/arch/arm/dts/k3-am654-r5-base-board.dts +++ b/arch/arm/dts/k3-am654-r5-base-board.dts @@ -330,5 +330,3 @@ &scm_conf { u-boot,dm-spl; }; - -#include "k3-am654-base-board-u-boot.dtsi"