diff mbox series

arm: snapdragon: Fix typo in clk_bcr_update()

Message ID 20210616024031.385496-1-sunxiaoyang2003@gmail.com
State Superseded
Delegated to: Tom Rini
Headers show
Series arm: snapdragon: Fix typo in clk_bcr_update() | expand

Commit Message

Sheep Sun June 16, 2021, 2:40 a.m. UTC
Fix typo in clock-snapdragon.c

Signed-off-by: Sheep Sun <sunxiaoyang2003@gmail.com>
---

 arch/arm/mach-snapdragon/clock-snapdragon.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

Comments

Ramon Fried June 16, 2021, 8:19 a.m. UTC | #1
On Wed, Jun 16, 2021 at 5:40 AM Sheep Sun <sunxiaoyang2003@gmail.com> wrote:
>
> Fix typo in clock-snapdragon.c
>
> Signed-off-by: Sheep Sun <sunxiaoyang2003@gmail.com>
> ---
>
>  arch/arm/mach-snapdragon/clock-snapdragon.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/mach-snapdragon/clock-snapdragon.c b/arch/arm/mach-snapdragon/clock-snapdragon.c
> index fbe0b5212f..2b76371718 100644
> --- a/arch/arm/mach-snapdragon/clock-snapdragon.c
> +++ b/arch/arm/mach-snapdragon/clock-snapdragon.c
> @@ -56,15 +56,15 @@ void clk_enable_vote_clk(phys_addr_t base, const struct vote_clk *vclk)
>         } while ((val != BRANCH_ON_VAL) && (val != BRANCH_NOC_FSM_ON_VAL));
>  }
>
> -#define APPS_CMD_RGCR_UPDATE BIT(0)
> +#define APPS_CMD_RCGR_UPDATE BIT(0)
>
> -/* Update clock command via CMD_RGCR */
> -void clk_bcr_update(phys_addr_t apps_cmd_rgcr)
> +/* Update clock command via CMD_RCGR */
> +void clk_bcr_update(phys_addr_t apps_cmd_rcgr)
>  {
> -       setbits_le32(apps_cmd_rgcr, APPS_CMD_RGCR_UPDATE);
> +       setbits_le32(apps_cmd_rcgr, APPS_CMD_RCGR_UPDATE);
>
>         /* Wait for frequency to be updated. */
> -       while (readl(apps_cmd_rgcr) & APPS_CMD_RGCR_UPDATE)
> +       while (readl(apps_cmd_rcgr) & APPS_CMD_RCGR_UPDATE)
>                 ;
>  }
>
> --
> 2.30.2
>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
diff mbox series

Patch

diff --git a/arch/arm/mach-snapdragon/clock-snapdragon.c b/arch/arm/mach-snapdragon/clock-snapdragon.c
index fbe0b5212f..2b76371718 100644
--- a/arch/arm/mach-snapdragon/clock-snapdragon.c
+++ b/arch/arm/mach-snapdragon/clock-snapdragon.c
@@ -56,15 +56,15 @@  void clk_enable_vote_clk(phys_addr_t base, const struct vote_clk *vclk)
 	} while ((val != BRANCH_ON_VAL) && (val != BRANCH_NOC_FSM_ON_VAL));
 }
 
-#define APPS_CMD_RGCR_UPDATE BIT(0)
+#define APPS_CMD_RCGR_UPDATE BIT(0)
 
-/* Update clock command via CMD_RGCR */
-void clk_bcr_update(phys_addr_t apps_cmd_rgcr)
+/* Update clock command via CMD_RCGR */
+void clk_bcr_update(phys_addr_t apps_cmd_rcgr)
 {
-	setbits_le32(apps_cmd_rgcr, APPS_CMD_RGCR_UPDATE);
+	setbits_le32(apps_cmd_rcgr, APPS_CMD_RCGR_UPDATE);
 
 	/* Wait for frequency to be updated. */
-	while (readl(apps_cmd_rgcr) & APPS_CMD_RGCR_UPDATE)
+	while (readl(apps_cmd_rcgr) & APPS_CMD_RCGR_UPDATE)
 		;
 }