diff mbox series

[2/4] sunxi_musb: Add musb configurations of sun8i-r40

Message ID 20210616023326.18135-2-qianfanguijin@163.com
State Rejected
Delegated to: Andre Przywara
Headers show
Series [1/4] phy-sun4i-usb: Fix sun8i_r40_cfg | expand

Commit Message

qianfan June 16, 2021, 2:33 a.m. UTC
From: qianfan Zhao <qianfanguijin@163.com>

R40 has 8 user-configurable endpoints and 8KB FIFO for EPs.

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
---
 drivers/usb/musb-new/sunxi.c | 31 ++++++++++++++++++++++++++++++-
 1 file changed, 30 insertions(+), 1 deletion(-)

Comments

Andre Przywara June 21, 2021, 12:34 a.m. UTC | #1
On Wed, 16 Jun 2021 10:33:24 +0800
qianfanguijin@163.com (qianfanguijin@163.com) wrote:

Hi,

> From: qianfan Zhao <qianfanguijin@163.com>
> 
> R40 has 8 user-configurable endpoints and 8KB FIFO for EPs.

This means the MUSB controller is fully compatible to the H3, so this
whole patch is not needed:

> 
> Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
> ---
>  drivers/usb/musb-new/sunxi.c | 31 ++++++++++++++++++++++++++++++-
>  1 file changed, 30 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/usb/musb-new/sunxi.c
> b/drivers/usb/musb-new/sunxi.c index fea4105f3d..e03299ea5b 100644
> --- a/drivers/usb/musb-new/sunxi.c
> +++ b/drivers/usb/musb-new/sunxi.c
> @@ -263,7 +263,6 @@ static int sunxi_musb_enable(struct musb *musb)
>  	}
>  
>  	USBC_ForceVbusValidToHigh(musb->mregs);
> -
>  	enabled = true;
>  	return 0;
>  }
> @@ -438,6 +437,30 @@ static struct musb_hdrc_config musb_config_h3 = {
>  	.ram_bits	= SUNXI_MUSB_RAM_BITS,
>  };
>  
> +/* R40/A40 OTG supports only 4 endpoints */
> +#define SUNXI_MUSB_MAX_EP_NUM_R40	5
> +
> +static struct musb_fifo_cfg sunxi_musb_mode_cfg_r40[] = {
> +	MUSB_EP_FIFO_SINGLE(1, FIFO_TX, 512),
> +	MUSB_EP_FIFO_SINGLE(1, FIFO_RX, 512),
> +	MUSB_EP_FIFO_SINGLE(2, FIFO_TX, 512),
> +	MUSB_EP_FIFO_SINGLE(2, FIFO_RX, 512),
> +	MUSB_EP_FIFO_SINGLE(3, FIFO_TX, 512),
> +	MUSB_EP_FIFO_SINGLE(3, FIFO_RX, 512),
> +	MUSB_EP_FIFO_SINGLE(4, FIFO_TX, 512),
> +	MUSB_EP_FIFO_SINGLE(4, FIFO_RX, 512),
> +};
> +
> +static struct musb_hdrc_config musb_config_r40 = {
> +	.fifo_cfg       = sunxi_musb_mode_cfg_r40,
> +	.fifo_cfg_size  = ARRAY_SIZE(sunxi_musb_mode_cfg_r40),
> +	.multipoint	= true,
> +	.dyn_fifo	= true,
> +	.soft_con       = true,
> +	.num_eps	= SUNXI_MUSB_MAX_EP_NUM_R40,
> +	.ram_bits	= SUNXI_MUSB_RAM_BITS,
> +};

Apart from changing the name, this is identical to the H3, so you won't
need a separate structure for that.

> +
>  static int musb_usb_probe(struct udevice *dev)
>  {
>  	struct sunxi_glue *glue = dev_get_priv(dev);
> @@ -527,6 +550,10 @@ static const struct sunxi_musb_config
> sun8i_h3_cfg = { .config = &musb_config_h3,
>  };
>  
> +static const struct sunxi_musb_config sun8i_r40_cfg = {
> +	.config = &musb_config_r40,
> +};
> +
>  static const struct udevice_id sunxi_musb_ids[] = {
>  	{ .compatible = "allwinner,sun4i-a10-musb",
>  			.data = (ulong)&sun4i_a10_cfg },
> @@ -536,6 +563,8 @@ static const struct udevice_id sunxi_musb_ids[] =
> { .data = (ulong)&sun6i_a31_cfg },
>  	{ .compatible = "allwinner,sun8i-h3-musb",
>  			.data = (ulong)&sun8i_h3_cfg },
> +	{ .compatible = "allwinner,sun8i-r40-musb",
> +			.data = (ulong)&sun8i_r40_cfg },

And since there is no difference to the H3, you don't need a separate
compatible string either. Just use "allwinner,sun8i-r40-musb",
"allwinner,sun8i-h3-musb" in the DT, and drop this whole patch here.

Cheers,
Andre

>  	{ }
>  };
>
diff mbox series

Patch

diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c
index fea4105f3d..e03299ea5b 100644
--- a/drivers/usb/musb-new/sunxi.c
+++ b/drivers/usb/musb-new/sunxi.c
@@ -263,7 +263,6 @@  static int sunxi_musb_enable(struct musb *musb)
 	}
 
 	USBC_ForceVbusValidToHigh(musb->mregs);
-
 	enabled = true;
 	return 0;
 }
@@ -438,6 +437,30 @@  static struct musb_hdrc_config musb_config_h3 = {
 	.ram_bits	= SUNXI_MUSB_RAM_BITS,
 };
 
+/* R40/A40 OTG supports only 4 endpoints */
+#define SUNXI_MUSB_MAX_EP_NUM_R40	5
+
+static struct musb_fifo_cfg sunxi_musb_mode_cfg_r40[] = {
+	MUSB_EP_FIFO_SINGLE(1, FIFO_TX, 512),
+	MUSB_EP_FIFO_SINGLE(1, FIFO_RX, 512),
+	MUSB_EP_FIFO_SINGLE(2, FIFO_TX, 512),
+	MUSB_EP_FIFO_SINGLE(2, FIFO_RX, 512),
+	MUSB_EP_FIFO_SINGLE(3, FIFO_TX, 512),
+	MUSB_EP_FIFO_SINGLE(3, FIFO_RX, 512),
+	MUSB_EP_FIFO_SINGLE(4, FIFO_TX, 512),
+	MUSB_EP_FIFO_SINGLE(4, FIFO_RX, 512),
+};
+
+static struct musb_hdrc_config musb_config_r40 = {
+	.fifo_cfg       = sunxi_musb_mode_cfg_r40,
+	.fifo_cfg_size  = ARRAY_SIZE(sunxi_musb_mode_cfg_r40),
+	.multipoint	= true,
+	.dyn_fifo	= true,
+	.soft_con       = true,
+	.num_eps	= SUNXI_MUSB_MAX_EP_NUM_R40,
+	.ram_bits	= SUNXI_MUSB_RAM_BITS,
+};
+
 static int musb_usb_probe(struct udevice *dev)
 {
 	struct sunxi_glue *glue = dev_get_priv(dev);
@@ -527,6 +550,10 @@  static const struct sunxi_musb_config sun8i_h3_cfg = {
 	.config = &musb_config_h3,
 };
 
+static const struct sunxi_musb_config sun8i_r40_cfg = {
+	.config = &musb_config_r40,
+};
+
 static const struct udevice_id sunxi_musb_ids[] = {
 	{ .compatible = "allwinner,sun4i-a10-musb",
 			.data = (ulong)&sun4i_a10_cfg },
@@ -536,6 +563,8 @@  static const struct udevice_id sunxi_musb_ids[] = {
 			.data = (ulong)&sun6i_a31_cfg },
 	{ .compatible = "allwinner,sun8i-h3-musb",
 			.data = (ulong)&sun8i_h3_cfg },
+	{ .compatible = "allwinner,sun8i-r40-musb",
+			.data = (ulong)&sun8i_r40_cfg },
 	{ }
 };