diff mbox series

[3/5] riscv: ae350: dts: Remove the unnecessary #address-cells in plic nodes

Message ID 20210604055113.3630286-3-bmeng.cn@gmail.com
State Accepted
Commit f050dd2b26abb4b107c3cdf7a5f5c420a9e1d4b6
Delegated to: Andes
Headers show
Series [1/5] riscv: ae350: dts: Add SPDX license header | expand

Commit Message

Bin Meng June 4, 2021, 5:51 a.m. UTC
PLIC nodes don't have child nodes, so #address-cells is not needed.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 arch/riscv/dts/ae350_32.dts | 2 --
 arch/riscv/dts/ae350_64.dts | 2 --
 2 files changed, 4 deletions(-)

Comments

Rick Chen June 15, 2021, 5:32 a.m. UTC | #1
> From: Bin Meng <bmeng.cn@gmail.com>
> Sent: Friday, June 04, 2021 1:51 PM
> To: Rick Jian-Zhi Chen(陳建志) <rick@andestech.com>; Leo Yu-Chi Liang(梁育齊) <ycliang@andestech.com>; U-Boot Mailing List <u-boot@lists.denx.de>
> Subject: [PATCH 3/5] riscv: ae350: dts: Remove the unnecessary #address-cells in plic nodes
>
> PLIC nodes don't have child nodes, so #address-cells is not needed.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  arch/riscv/dts/ae350_32.dts | 2 --
>  arch/riscv/dts/ae350_64.dts | 2 --
>  2 files changed, 4 deletions(-)

Reviewed-by: Rick Chen <rick@andestech.com>
Leo Liang June 15, 2021, 3:59 p.m. UTC | #2
On Fri, Jun 04, 2021 at 01:51:11PM +0800, Bin Meng wrote:
> PLIC nodes don't have child nodes, so #address-cells is not needed.
> 
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
> 
>  arch/riscv/dts/ae350_32.dts | 2 --
>  arch/riscv/dts/ae350_64.dts | 2 --
>  2 files changed, 4 deletions(-)

Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
diff mbox series

Patch

diff --git a/arch/riscv/dts/ae350_32.dts b/arch/riscv/dts/ae350_32.dts
index b90351e87b..0917b83108 100644
--- a/arch/riscv/dts/ae350_32.dts
+++ b/arch/riscv/dts/ae350_32.dts
@@ -135,7 +135,6 @@ 
 
 		plic0: interrupt-controller@e4000000 {
 			compatible = "riscv,plic0";
-			#address-cells = <1>;
 			#interrupt-cells = <1>;
 			interrupt-controller;
 			reg = <0xe4000000 0x2000000>;
@@ -148,7 +147,6 @@ 
 
 		plic1: interrupt-controller@e6400000 {
 			compatible = "riscv,plic1";
-			#address-cells = <1>;
 			#interrupt-cells = <1>;
 			interrupt-controller;
 			reg = <0xe6400000 0x400000>;
diff --git a/arch/riscv/dts/ae350_64.dts b/arch/riscv/dts/ae350_64.dts
index 27ac21c716..564e94a1db 100644
--- a/arch/riscv/dts/ae350_64.dts
+++ b/arch/riscv/dts/ae350_64.dts
@@ -135,7 +135,6 @@ 
 
 		plic0: interrupt-controller@e4000000 {
 			compatible = "riscv,plic0";
-			#address-cells = <2>;
 			#interrupt-cells = <2>;
 			interrupt-controller;
 			reg = <0x0 0xe4000000 0x0 0x2000000>;
@@ -148,7 +147,6 @@ 
 
 		plic1: interrupt-controller@e6400000 {
 			compatible = "riscv,plic1";
-			#address-cells = <2>;
 			#interrupt-cells = <2>;
 			interrupt-controller;
 			reg = <0x0 0xe6400000 0x0 0x400000>;