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[144.168.56.201]) by smtp.gmail.com with ESMTPSA id d3sm1405661pfn.141.2021.05.10.05.24.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 May 2021 05:24:10 -0700 (PDT) From: Bin Meng To: Simon Glass , Rick Chen , u-boot@lists.denx.de Cc: Bin Meng Subject: [PATCH v5 10/13] riscv: dts: Sort build targets in alphabetical order Date: Mon, 10 May 2021 20:23:38 +0800 Message-Id: <20210510122341.13798-11-bmeng.cn@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210510122341.13798-1-bmeng.cn@gmail.com> References: <20210510122341.13798-1-bmeng.cn@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean Sort the RISC-V DTS build targets by their Kconfig target names in alphabetical order. Signed-off-by: Bin Meng Reviewed-by: Simon Glass --- (no changes since v2) Changes in v2: - new patch: "riscv: dts: Sort build targets in alphabetical order" arch/riscv/dts/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile index 8138d89d84..3780334875 100644 --- a/arch/riscv/dts/Makefile +++ b/arch/riscv/dts/Makefile @@ -1,9 +1,9 @@ # SPDX-License-Identifier: GPL-2.0+ dtb-$(CONFIG_TARGET_AX25_AE350) += ae350_32.dtb ae350_64.dtb +dtb-$(CONFIG_TARGET_MICROCHIP_ICICLE) += microchip-mpfs-icicle-kit.dtb dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb -dtb-$(CONFIG_TARGET_MICROCHIP_ICICLE) += microchip-mpfs-icicle-kit.dtb targets += $(dtb-y)