@@ -564,6 +564,15 @@ int config_board_mux(void)
}
#endif
+#if CONFIG_IS_ENABLED(TARGET_LX2160ARDB)
+u8 get_board_rev(void)
+{
+ u8 board_rev = (QIXIS_READ(arch) & 0xf) - 1 + 'A';
+
+ return board_rev;
+}
+#endif
+
unsigned long get_board_sys_clk(void)
{
#if defined(CONFIG_TARGET_LX2160AQDS) || defined(CONFIG_TARGET_LX2162AQDS)
@@ -847,7 +856,6 @@ int ft_board_setup(void *blob, struct bd_info *bd)
u64 mc_memory_base = 0;
u64 mc_memory_size = 0;
u16 total_memory_banks;
- u8 board_rev;
ft_cpu_setup(blob, bd);
@@ -903,8 +911,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
fdt_fixup_icid(blob);
if (IS_ENABLED(CONFIG_TARGET_LX2160ARDB)) {
- board_rev = (QIXIS_READ(arch) & 0xf) - 1 + 'A';
- if (board_rev == 'C')
+ if (get_board_rev() >= 'C')
fdt_fixup_i2c_thermal_node(blob);
}
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
*/
#ifndef __LX2160_H
@@ -58,4 +58,8 @@
#endif
#endif
+#if CONFIG_IS_ENABLED(TARGET_LX2160ARDB)
+u8 get_board_rev(void);
+#endif
+
#endif /* __LX2160_H */