From patchwork Mon Apr 26 12:14:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 1470266 X-Patchwork-Delegate: andre.przywara@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FTP462Z2Hz9t10 for ; Mon, 26 Apr 2021 22:15:34 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 5BCDA82057; Mon, 26 Apr 2021 14:15:27 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 7358981F8C; Mon, 26 Apr 2021 14:15:24 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id CE40480774 for ; Mon, 26 Apr 2021 14:15:20 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=andre.przywara@arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C5ECB31B; Mon, 26 Apr 2021 05:15:18 -0700 (PDT) Received: from localhost.localdomain (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 87C6B3F70D; Mon, 26 Apr 2021 05:15:17 -0700 (PDT) From: Andre Przywara To: Jagan Teki Cc: Jernej Skrabec , Samuel Holland , Icenowy Zheng , u-boot@lists.denx.de, linux-sunxi@googlegroups.com, linux-sunxi@lists.linux.dev Subject: [PATCH] sunxi: board: Add H616 MMC2 pins Date: Mon, 26 Apr 2021 13:14:46 +0100 Message-Id: <20210426121446.8013-1-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean We hardcode the pinctrl setting for the MMC controllers in boards.c, since we need them also in the SPL, where there is no DT yet. Add the respective setting for the H616 SoC, to enable eMMC on boards with this SoC as well. Also to make diagnosing this problem easier, print a warning if a board tries to setup MMC2 pins without a respective SoC setting being defined. Signed-off-by: Andre Przywara Reviewed-by: Jagan Teki Reviewed-by: Jernej Skrabec --- board/sunxi/board.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/board/sunxi/board.c b/board/sunxi/board.c index b97ca578f7f..f825dfd7ce8 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -555,6 +555,17 @@ static void mmc_pinmux_setup(int sdc) sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); sunxi_gpio_set_drv(pin, 2); } +#elif defined(CONFIG_MACH_SUN50I_H616) + /* SDC2: PC0-PC1, PC5-PC6, PC8-PC11, PC13-PC16 */ + for (pin = SUNXI_GPC(0); pin <= SUNXI_GPC(16); pin++) { + if (pin > SUNXI_GPC(1) && pin < SUNXI_GPC(5)) + continue; + if (pin == SUNXI_GPC(7) || pin == SUNXI_GPC(12)) + continue; + sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); + sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); + sunxi_gpio_set_drv(pin, 2); + } #elif defined(CONFIG_MACH_SUN9I) /* SDC2: PC6-PC16 */ for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(16); pin++) { @@ -562,6 +573,8 @@ static void mmc_pinmux_setup(int sdc) sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); sunxi_gpio_set_drv(pin, 2); } +#else + puts("ERROR: No pinmux setup defined for MMC2!\n"); #endif break;