From patchwork Wed Mar 24 14:06:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Roese X-Patchwork-Id: 1457914 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=denx.de header.i=@denx.de header.a=rsa-sha256 header.s=phobos-20191101 header.b=DQUK5HS/; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4F59B45MsXz9sRR for ; Thu, 25 Mar 2021 01:10:36 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 4EF3E82900; Wed, 24 Mar 2021 15:08:21 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1616594901; bh=ZkfF8M66NWymjpPFyVpZNAWoEjkHg6oySqp31IUS5S4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=DQUK5HS/5xtqe3OmUkJdTJ6uCy3oX309iLRuooCbMHPO/kM1h37HIkmIrU+0fNtg1 8ctBrFt813KXdMG2p6ej7BQUvtG5BBGksapcxyrn/Ft1EOPpKykAzIRKKu1r1BBybq 6osOKo8SWBvLrXcQ820npUD3UbzAKl3pR9cOZcoSf6oLoKLrG4bxIfarUIfXaaoqV4 ePodQtdgEKE6sqGrd2mkiObH81io3IYX3PF8hwjoNphtvBI+MhZGph/qoqZzFGzmnL jawQpHL95+XAEE7vQNImyPG2ZCYPtvYrkzHH58UsZNyfGC1F8q/Z+VCwOWY0NvLEes nEhzLiV3GrrbQ== Received: by phobos.denx.de (Postfix, from userid 109) id 2319A82861; Wed, 24 Mar 2021 15:07:20 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mout-u-107.mailbox.org (mout-u-107.mailbox.org [91.198.250.252]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 4D0858286B for ; Wed, 24 Mar 2021 15:07:03 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=sr@denx.de Received: from smtp2.mailbox.org (smtp2.mailbox.org [80.241.60.241]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-u-107.mailbox.org (Postfix) with ESMTPS id 4F595z0FG5zQjhG; Wed, 24 Mar 2021 15:07:03 +0100 (CET) Received: from smtp2.mailbox.org ([80.241.60.241]) by hefe.heinlein-support.de (hefe.heinlein-support.de [91.198.250.172]) (amavisd-new, port 10030) with ESMTP id L-JqZLrU7DHP; Wed, 24 Mar 2021 15:06:59 +0100 (CET) From: Stefan Roese To: u-boot@lists.denx.de Cc: Nadav Haklai , =?utf-8?q?Pali_Roh=C3=A1r?= , Kostya Porotchkin , =?utf-8?q?Marek_Beh=C3=BAn?= , Grzegorz Jaszczyk , Igal Liberman , Baruch Siach Subject: [PATCH v1 22/23] phy: marvell: utmi: update utmi config which fixes usb2.0 instability Date: Wed, 24 Mar 2021 15:06:48 +0100 Message-Id: <20210324150326.v1.22.Ifa0a585bfb5ecab0bfa033eed6874ff98b16a7df@changeid> In-Reply-To: <20210324140649.1413122-1-sr@denx.de> References: <20210324140649.1413122-1-sr@denx.de> MIME-Version: 1.0 X-MBO-SPAM-Probability: ** X-Rspamd-Score: 1.97 / 15.00 / 15.00 X-Rspamd-Queue-Id: 055AF180F X-Rspamd-UID: 379232 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean From: Grzegorz Jaszczyk - Add additional step which enables the Impedance and PLL calibration. - Enable old squelch detector instead of the new analog squelch detector circuit and update host disconnect threshold value. - Update LS TX driver strength coarse and fine adjustment values. Signed-off-by: Grzegorz Jaszczyk Signed-off-by: Stefan Roese --- drivers/phy/marvell/comphy_cp110.c | 23 ++++++++++++++++++----- drivers/phy/marvell/utmi_phy.h | 9 +++++++++ 2 files changed, 27 insertions(+), 5 deletions(-) diff --git a/drivers/phy/marvell/comphy_cp110.c b/drivers/phy/marvell/comphy_cp110.c index 576538feb706..418318d12f6b 100644 --- a/drivers/phy/marvell/comphy_cp110.c +++ b/drivers/phy/marvell/comphy_cp110.c @@ -288,21 +288,34 @@ static void comphy_utmi_phy_config(u32 utmi_index, void __iomem *utmi_pll_addr, reg_set(utmi_pll_addr + UTMI_PLL_CTRL_REG, data, mask); /* Impedance Calibration Threshold Setting */ - reg_set(utmi_pll_addr + UTMI_CALIB_CTRL_REG, - 0x7 << UTMI_CALIB_CTRL_IMPCAL_VTH_OFFSET, - UTMI_CALIB_CTRL_IMPCAL_VTH_MASK); + mask = UTMI_CALIB_CTRL_IMPCAL_VTH_MASK; + data = 0x7 << UTMI_CALIB_CTRL_IMPCAL_VTH_OFFSET; + reg_set(utmi_pll_addr + UTMI_CALIB_CTRL_REG, data, mask); + + /* Start Impedance and PLL Calibration */ + mask = UTMI_CALIB_CTRL_PLLCAL_START_MASK; + data = (0x1 << UTMI_CALIB_CTRL_PLLCAL_START_OFFSET); + mask |= UTMI_CALIB_CTRL_IMPCAL_START_MASK; + data |= (0x1 << UTMI_CALIB_CTRL_IMPCAL_START_OFFSET); + reg_set(utmi_pll_addr + UTMI_CALIB_CTRL_REG, data, mask); /* Set LS TX driver strength coarse control */ mask = UTMI_TX_CH_CTRL_AMP_MASK; data = 0x4 << UTMI_TX_CH_CTRL_AMP_OFFSET; + mask |= UTMI_TX_CH_CTRL_IMP_SEL_LS_MASK; + data |= 0x3 << UTMI_TX_CH_CTRL_IMP_SEL_LS_OFFSET; + mask |= UTMI_TX_CH_CTRL_DRV_EN_LS_MASK; + data |= 0x3 << UTMI_TX_CH_CTRL_DRV_EN_LS_OFFSET; reg_set(utmi_base_addr + UTMI_TX_CH_CTRL_REG, data, mask); /* Enable SQ */ mask = UTMI_RX_CH_CTRL0_SQ_DET_MASK; - data = 0x0 << UTMI_RX_CH_CTRL0_SQ_DET_OFFSET; + data = 0x1 << UTMI_RX_CH_CTRL0_SQ_DET_OFFSET; /* Enable analog squelch detect */ mask |= UTMI_RX_CH_CTRL0_SQ_ANA_DTC_MASK; - data |= 0x1 << UTMI_RX_CH_CTRL0_SQ_ANA_DTC_OFFSET; + data |= 0x0 << UTMI_RX_CH_CTRL0_SQ_ANA_DTC_OFFSET; + mask |= UTMI_RX_CH_CTRL0_DISCON_THRESH_MASK; + data |= 0x0 << UTMI_RX_CH_CTRL0_DISCON_THRESH_OFFSET; reg_set(utmi_base_addr + UTMI_RX_CH_CTRL0_REG, data, mask); /* Set External squelch calibration number */ diff --git a/drivers/phy/marvell/utmi_phy.h b/drivers/phy/marvell/utmi_phy.h index d1cad07cf50f..8a570bae7390 100644 --- a/drivers/phy/marvell/utmi_phy.h +++ b/drivers/phy/marvell/utmi_phy.h @@ -38,6 +38,12 @@ #define UTMI_CALIB_CTRL_IMPCAL_VTH_OFFSET 8 #define UTMI_CALIB_CTRL_IMPCAL_VTH_MASK \ (0x7 << UTMI_CALIB_CTRL_IMPCAL_VTH_OFFSET) +#define UTMI_CALIB_CTRL_IMPCAL_START_OFFSET 13 +#define UTMI_CALIB_CTRL_IMPCAL_START_MASK \ + (0x1 << UTMI_CALIB_CTRL_IMPCAL_START_OFFSET) +#define UTMI_CALIB_CTRL_PLLCAL_START_OFFSET 22 +#define UTMI_CALIB_CTRL_PLLCAL_START_MASK \ + (0x1 << UTMI_CALIB_CTRL_PLLCAL_START_OFFSET) #define UTMI_CALIB_CTRL_IMPCAL_DONE_OFFSET 23 #define UTMI_CALIB_CTRL_IMPCAL_DONE_MASK \ (0x1 << UTMI_CALIB_CTRL_IMPCAL_DONE_OFFSET) @@ -57,6 +63,9 @@ (0x7 << UTMI_TX_CH_CTRL_AMP_OFFSET) #define UTMI_RX_CH_CTRL0_REG 0x8 +#define UTMI_RX_CH_CTRL0_DISCON_THRESH_OFFSET 8 +#define UTMI_RX_CH_CTRL0_DISCON_THRESH_MASK \ + (0x3 << UTMI_RX_CH_CTRL0_DISCON_THRESH_OFFSET) #define UTMI_RX_CH_CTRL0_SQ_DET_OFFSET 15 #define UTMI_RX_CH_CTRL0_SQ_DET_MASK \ (0x1 << UTMI_RX_CH_CTRL0_SQ_DET_OFFSET)