| Message ID | 20210307042538.21229-3-marek.behun@nic.cz |
|---|---|
| State | Accepted |
| Commit | 74f4929c2c73beb595faf7d5d9bb6a78d710c2fd |
| Delegated to: | Stefan Roese |
| Headers | show |
| Series | U-Boot LTO (Sandbox + Some ARM boards) | expand |
On 07.03.21 05:25, Marek Behún wrote: > The arrays `pbs_dq_mapping`, `div_ratio1to1` and `div_ratio2to1` have > different bounds declared in header files where these variables are also > defined from the ones declared in source files. > > This causes the compiler to complain (when building with LTO): > ddr3_sdram.c:24:12: warning: type of ‘pbs_dq_mapping’ does not match > original declaration > [-Wlto-type-mismatch] > ddr3_patterns_64bit.h:911:5: note: array types have different bounds > ddr3_patterns_64bit.h:911:5: note: ‘pbs_dq_mapping’ was previously > declared here > > ddr3_dfs.c:45:11: warning: type of ‘div_ratio1to1’ does not match > original declaration [-Wlto-type-mismatch] > ddr3_axp_vars.h:167:4: note: array types have different bounds > ddr3_axp_vars.h:167:4: note: ‘div_ratio1to1’ was previously declared > here > > ddr3_dfs.c:46:11: warning: type of ‘div_ratio2to1’ does not match > original declaration [-Wlto-type-mismatch] > ddr3_axp_vars.h:196:4: note: array types have different bounds > ddr3_axp_vars.h:196:4: note: ‘div_ratio2to1’ was previously declared > here > > CI managed to trigger this as an error when compiling with LTO for AXP. > > Fix this by using values from the header files, which seem to be the > correct ones. > > Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Thanks, Stefan > --- > drivers/ddr/marvell/axp/ddr3_dfs.c | 4 ++-- > drivers/ddr/marvell/axp/ddr3_sdram.c | 2 +- > 2 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/ddr/marvell/axp/ddr3_dfs.c b/drivers/ddr/marvell/axp/ddr3_dfs.c > index b58c0fe01e..2a4596680b 100644 > --- a/drivers/ddr/marvell/axp/ddr3_dfs.c > +++ b/drivers/ddr/marvell/axp/ddr3_dfs.c > @@ -42,8 +42,8 @@ extern u8 div_ratio[CLK_VCO][CLK_DDR]; > extern void get_target_freq(u32 freq_mode, u32 *ddr_freq, u32 *hclk_ps); > #else > extern u16 odt_dynamic[ODT_OPT][MAX_CS]; > -extern u8 div_ratio1to1[CLK_CPU][CLK_DDR]; > -extern u8 div_ratio2to1[CLK_CPU][CLK_DDR]; > +extern u8 div_ratio1to1[CLK_VCO][CLK_DDR]; > +extern u8 div_ratio2to1[CLK_VCO][CLK_DDR]; > #endif > extern u16 odt_static[ODT_OPT][MAX_CS]; > > diff --git a/drivers/ddr/marvell/axp/ddr3_sdram.c b/drivers/ddr/marvell/axp/ddr3_sdram.c > index 3a266c6de4..0b150b20f3 100644 > --- a/drivers/ddr/marvell/axp/ddr3_sdram.c > +++ b/drivers/ddr/marvell/axp/ddr3_sdram.c > @@ -21,7 +21,7 @@ extern u32 pbs_pattern_32b[2][LEN_PBS_PATTERN]; > #if defined(MV88F78X60) > extern u32 pbs_pattern_64b[2][LEN_PBS_PATTERN]; > #endif > -extern u32 pbs_dq_mapping[PUP_NUM_64BIT][DQ_NUM]; > +extern u32 pbs_dq_mapping[PUP_NUM_64BIT + 1][DQ_NUM]; > > #if defined(MV88F78X60) || defined(MV88F672X) > /* PBS locked dq (per pup) */ > Viele Grüße, Stefan
> Reviewed-by: Stefan Roese <sr@denx.de>
Thanks, Stefan.
Do you want to merge this into your repo u-boot-marvell, or shall Tom
merge this once this series is mature?
Marek
And BTW do you have time to test this series on some ARM boards?
On Sun, Mar 7, 2021 at 12:26 PM Marek Behún <marek.behun@nic.cz> wrote: > > The arrays `pbs_dq_mapping`, `div_ratio1to1` and `div_ratio2to1` have > different bounds declared in header files where these variables are also > defined from the ones declared in source files. > > This causes the compiler to complain (when building with LTO): > ddr3_sdram.c:24:12: warning: type of ‘pbs_dq_mapping’ does not match > original declaration > [-Wlto-type-mismatch] > ddr3_patterns_64bit.h:911:5: note: array types have different bounds > ddr3_patterns_64bit.h:911:5: note: ‘pbs_dq_mapping’ was previously > declared here > > ddr3_dfs.c:45:11: warning: type of ‘div_ratio1to1’ does not match > original declaration [-Wlto-type-mismatch] > ddr3_axp_vars.h:167:4: note: array types have different bounds > ddr3_axp_vars.h:167:4: note: ‘div_ratio1to1’ was previously declared > here > > ddr3_dfs.c:46:11: warning: type of ‘div_ratio2to1’ does not match > original declaration [-Wlto-type-mismatch] > ddr3_axp_vars.h:196:4: note: array types have different bounds > ddr3_axp_vars.h:196:4: note: ‘div_ratio2to1’ was previously declared > here > > CI managed to trigger this as an error when compiling with LTO for AXP. > > Fix this by using values from the header files, which seem to be the > correct ones. > > Signed-off-by: Marek Behún <marek.behun@nic.cz> > --- > drivers/ddr/marvell/axp/ddr3_dfs.c | 4 ++-- > drivers/ddr/marvell/axp/ddr3_sdram.c | 2 +- > 2 files changed, 3 insertions(+), 3 deletions(-) > Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
On 08.03.21 07:45, Marek Behun wrote: >> Reviewed-by: Stefan Roese <sr@denx.de> > > Thanks, Stefan. > Do you want to merge this into your repo u-boot-marvell, or shall Tom > merge this once this series is mature? AFAIU, your patch series touches many architectures / platforms. It' currently assigned to Tom in patchwork and it perhaps makes more sense to pull it as one patchset. If it is preferred that I shall pull the 2 Marvell related patches via the Marvell repo, I can definitely do so. But for now I'm waiting for Tom to handle this. BTW: Many thanks for working on this. The size improvement is great and the additional bug fixes are also very helpful. :) Thanks, Stefan
Hi Marek,
On 08.03.21 07:46, Marek Behun wrote:
> And BTW do you have time to test this series on some ARM boards?
I can test this on the theadorable Armada XP board, which also uses
SPL. Do you have a git repo I should use? Or is the patch series from
yesterday the "latest and greatest"?
Thanks,
Stefan
On Mon, 8 Mar 2021 07:58:30 +0100 Stefan Roese <sr@denx.de> wrote: > Hi Marek, > > On 08.03.21 07:46, Marek Behun wrote: > > And BTW do you have time to test this series on some ARM boards? > > I can test this on the theadorable Armada XP board, which also uses > SPL. Do you have a git repo I should use? Or is the patch series from > yesterday the "latest and greatest"? > > Thanks, > Stefan https://github.com/elkablo/u-boot branch lto but you need to also add the last patch from this series on the mailing list, which enables LTO for all ARM boards, or enable CONFIG_LTO=y manually after defconfig Marek
On Mon, Mar 08, 2021 at 07:50:59AM +0100, Stefan Roese wrote: > On 08.03.21 07:45, Marek Behun wrote: > > > Reviewed-by: Stefan Roese <sr@denx.de> > > > > Thanks, Stefan. > > Do you want to merge this into your repo u-boot-marvell, or shall Tom > > merge this once this series is mature? > > AFAIU, your patch series touches many architectures / platforms. It' > currently assigned to Tom in patchwork and it perhaps makes more sense > to pull it as one patchset. > > If it is preferred that I shall pull the 2 Marvell related patches > via the Marvell repo, I can definitely do so. But for now I'm waiting > for Tom to handle this. If it's not exposing problems prior to LTO, I'll take it as the series, if it's exposing problems today and it should go in now rather than for v2021.07, please pick it up for the marvell tree. Thanks!
On 09.03.21 14:54, Tom Rini wrote: > On Mon, Mar 08, 2021 at 07:50:59AM +0100, Stefan Roese wrote: >> On 08.03.21 07:45, Marek Behun wrote: >>>> Reviewed-by: Stefan Roese <sr@denx.de> >>> >>> Thanks, Stefan. >>> Do you want to merge this into your repo u-boot-marvell, or shall Tom >>> merge this once this series is mature? >> >> AFAIU, your patch series touches many architectures / platforms. It' >> currently assigned to Tom in patchwork and it perhaps makes more sense >> to pull it as one patchset. >> >> If it is preferred that I shall pull the 2 Marvell related patches >> via the Marvell repo, I can definitely do so. But for now I'm waiting >> for Tom to handle this. > > If it's not exposing problems prior to LTO, I'll take it as the series, > if it's exposing problems today and it should go in now rather than for > v2021.07, please pick it up for the marvell tree. Thanks! I've added 2 Marvell related patches to my patch queue for master now. Pull request will follow soon, Thanks, Stefan
diff --git a/drivers/ddr/marvell/axp/ddr3_dfs.c b/drivers/ddr/marvell/axp/ddr3_dfs.c index b58c0fe01e..2a4596680b 100644 --- a/drivers/ddr/marvell/axp/ddr3_dfs.c +++ b/drivers/ddr/marvell/axp/ddr3_dfs.c @@ -42,8 +42,8 @@ extern u8 div_ratio[CLK_VCO][CLK_DDR]; extern void get_target_freq(u32 freq_mode, u32 *ddr_freq, u32 *hclk_ps); #else extern u16 odt_dynamic[ODT_OPT][MAX_CS]; -extern u8 div_ratio1to1[CLK_CPU][CLK_DDR]; -extern u8 div_ratio2to1[CLK_CPU][CLK_DDR]; +extern u8 div_ratio1to1[CLK_VCO][CLK_DDR]; +extern u8 div_ratio2to1[CLK_VCO][CLK_DDR]; #endif extern u16 odt_static[ODT_OPT][MAX_CS]; diff --git a/drivers/ddr/marvell/axp/ddr3_sdram.c b/drivers/ddr/marvell/axp/ddr3_sdram.c index 3a266c6de4..0b150b20f3 100644 --- a/drivers/ddr/marvell/axp/ddr3_sdram.c +++ b/drivers/ddr/marvell/axp/ddr3_sdram.c @@ -21,7 +21,7 @@ extern u32 pbs_pattern_32b[2][LEN_PBS_PATTERN]; #if defined(MV88F78X60) extern u32 pbs_pattern_64b[2][LEN_PBS_PATTERN]; #endif -extern u32 pbs_dq_mapping[PUP_NUM_64BIT][DQ_NUM]; +extern u32 pbs_dq_mapping[PUP_NUM_64BIT + 1][DQ_NUM]; #if defined(MV88F78X60) || defined(MV88F672X) /* PBS locked dq (per pup) */
The arrays `pbs_dq_mapping`, `div_ratio1to1` and `div_ratio2to1` have different bounds declared in header files where these variables are also defined from the ones declared in source files. This causes the compiler to complain (when building with LTO): ddr3_sdram.c:24:12: warning: type of ‘pbs_dq_mapping’ does not match original declaration [-Wlto-type-mismatch] ddr3_patterns_64bit.h:911:5: note: array types have different bounds ddr3_patterns_64bit.h:911:5: note: ‘pbs_dq_mapping’ was previously declared here ddr3_dfs.c:45:11: warning: type of ‘div_ratio1to1’ does not match original declaration [-Wlto-type-mismatch] ddr3_axp_vars.h:167:4: note: array types have different bounds ddr3_axp_vars.h:167:4: note: ‘div_ratio1to1’ was previously declared here ddr3_dfs.c:46:11: warning: type of ‘div_ratio2to1’ does not match original declaration [-Wlto-type-mismatch] ddr3_axp_vars.h:196:4: note: array types have different bounds ddr3_axp_vars.h:196:4: note: ‘div_ratio2to1’ was previously declared here CI managed to trigger this as an error when compiling with LTO for AXP. Fix this by using values from the header files, which seem to be the correct ones. Signed-off-by: Marek Behún <marek.behun@nic.cz> --- drivers/ddr/marvell/axp/ddr3_dfs.c | 4 ++-- drivers/ddr/marvell/axp/ddr3_sdram.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-)