From patchwork Sun Feb 28 14:12:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 1445254 X-Patchwork-Delegate: lokeshvutla@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=libero.it header.i=@libero.it header.a=rsa-sha256 header.s=s2021 header.b=ZNhnUThA; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4DpQP33kR2z9rx6 for ; Mon, 1 Mar 2021 01:13:59 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D4D3581FFE; Sun, 28 Feb 2021 15:13:23 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=libero.it Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=libero.it header.i=@libero.it header.b="ZNhnUThA"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 7997081FE7; Sun, 28 Feb 2021 15:13:07 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=0.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FORGED_SPF_HELO,FREEMAIL_FROM, RCVD_IN_SORBS_WEB,SPF_HELO_PASS autolearn=no autolearn_force=no version=3.4.2 Received: from libero.it (smtp-17.italiaonline.it [213.209.10.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id E4F42806C5 for ; Sun, 28 Feb 2021 15:12:59 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=libero.it Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=dariobin@libero.it Received: from passgat-Modern-14-A10M.homenet.telecomitalia.it ([87.20.116.197]) by smtp-17.iol.local with ESMTPA id GMoXljE45lChfGModlwAEn; Sun, 28 Feb 2021 15:12:59 +0100 x-libjamoibt: 1601 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=libero.it; s=s2021; t=1614521579; bh=eW2qBIhkdzzQtc+UD6U5OB1Fs/AiA/h2JEsjsJES/eY=; h=From; b=ZNhnUThAas0ZED2t64WlqQIMxGWnqkov8lgsHqhu45hQSVeZBr0dpYiRxGh5CoHoy ei3RefBRW36iLWeI7J0yg1H8rqU2YAwD8a8Xk6sxzX4xKgjJs+W9j9KClyLZg0sBdM Q4uxpcLwo7XxLwS+7/C9051WhHFsktJk+QIPhpH55LjsgX0gutjGuQ73i/YyKi7pKJ Snf5hd93mth/nQHxh0NbCh5qYOt6v97FcWELTzDhZ8HADtvDcCEQruAYn38MJAS9QP QaKbZTCUHSNwT+xFlvDOaFqBxVJvAHvjHtNxIMOh9Aut033o5SMaiHdl3A3spFnyx2 K4q2/zQAOuq5g== X-CNFS-Analysis: v=2.4 cv=S6McfKgP c=1 sm=1 tr=0 ts=603ba4eb cx=a_exe a=AVqmXbCQpuNSdJmApS5GbQ==:117 a=AVqmXbCQpuNSdJmApS5GbQ==:17 a=sozttTNsAAAA:8 a=wv_ar1DUYrJP48xX2MwA:9 a=aeg5Gbbo78KNqacMgKqU:22 From: Dario Binacchi To: u-boot@lists.denx.de Cc: Lokesh Vutla , Dario Binacchi , Patrick Delaunay , Pratyush Yadav , Simon Glass Subject: [PATCH v3 03/12] pinctrl: single: fix offset management Date: Sun, 28 Feb 2021 15:12:32 +0100 Message-Id: <20210228141241.15931-4-dariobin@libero.it> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210228141241.15931-1-dariobin@libero.it> References: <20210228141241.15931-1-dariobin@libero.it> X-CMAE-Envelope: MS4xfFnMY2sSEw+ezUkgRQs/nEVHtxt9azOz3t1Jt3SbYyXHyRN5G9xa3xLWIsLWHzbaagD7NE/+n4SJ0IB21znSp357F5WQm3Z8aoCB3W5zYHWf/KtYLSbI YmiHsq9x+x5IGG7/F9TwCDJenm/+kZjkO9H+XpOjQfm2SzfWIp9sxq7hVXPcZcLgaJXkWT2XWRc5XtE3B7O1gG19H0lEajhBH8r2kTpY5aIS8C1csbfcZKyg X2206Bde8U/vjugZuRWUmSSd1WfB2rh3VFudGGK7JbfsS1Xp57pvm17R/Qx6GSjUsDkDL9MqmpNofwupyIahybMy97iQDZ9dckOWxLfI/n5wpfcnXiwlqome iL+AaC4EFv9b4a1ScpyBCQpjagXmNQ== X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean The pinmux configuration DT node of a peripheral does not define a physical address but an offset. Only by adding it to the base address of the controller it is possible to calculate the physical address of the register to be configured. Printing an offset also requires a different formatting option than a physical address. Signed-off-by: Dario Binacchi Reviewed-by: Pratyush Yadav --- Changes in v3: - Added Pratyush Yadav review tag. drivers/pinctrl/pinctrl-single.c | 24 ++++++++++++++---------- 1 file changed, 14 insertions(+), 10 deletions(-) diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index 49ed15211d..935b5e920d 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -77,15 +77,17 @@ static int single_configure_pins(struct udevice *dev, struct single_pdata *pdata = dev_get_plat(dev); int n, count = size / sizeof(struct single_fdt_pin_cfg); phys_addr_t reg; - u32 val; + u32 offset, val; for (n = 0; n < count; n++, pins++) { - reg = fdt32_to_cpu(pins->reg); - if ((reg < 0) || (reg > pdata->offset)) { - dev_dbg(dev, " invalid register offset 0x%pa\n", ®); + offset = fdt32_to_cpu(pins->reg); + if (offset < 0 || offset > pdata->offset) { + dev_dbg(dev, " invalid register offset 0x%x\n", + offset); continue; } - reg += pdata->base; + + reg = pdata->base + offset; val = fdt32_to_cpu(pins->val) & pdata->mask; switch (pdata->width) { case 16: @@ -111,15 +113,17 @@ static int single_configure_bits(struct udevice *dev, struct single_pdata *pdata = dev_get_plat(dev); int n, count = size / sizeof(struct single_fdt_bits_cfg); phys_addr_t reg; - u32 val, mask; + u32 offset, val, mask; for (n = 0; n < count; n++, pins++) { - reg = fdt32_to_cpu(pins->reg); - if ((reg < 0) || (reg > pdata->offset)) { - dev_dbg(dev, " invalid register offset 0x%pa\n", ®); + offset = fdt32_to_cpu(pins->reg); + if (offset < 0 || offset > pdata->offset) { + dev_dbg(dev, " invalid register offset 0x%x\n", + offset); continue; } - reg += pdata->base; + + reg = pdata->base + offset; mask = fdt32_to_cpu(pins->mask); val = fdt32_to_cpu(pins->val) & mask;