From patchwork Fri Feb 26 07:51:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Roese X-Patchwork-Id: 1444794 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=denx.de header.i=@denx.de header.a=rsa-sha256 header.s=phobos-20191101 header.b=W8RHTRmU; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4Dn21Q3kFZz9rx6 for ; Fri, 26 Feb 2021 18:52:10 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 4BDB5806C3; Fri, 26 Feb 2021 08:52:00 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1614325920; bh=Gs1v9AR1meclefkjch77ibRb1YDMeo8WLE073WBRGbU=; h=From:To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From; b=W8RHTRmUUiwxvgtVmDmiRyVOsrEl1gdljQkT/fIDS53QIk2POgQo6wuviwtN+iuKk 421fcKrzwqPKljzbhu1I8CpHI2wduF7n1q+9Hsera6YYTSFLbTsS/RwMD0KegA+Tz6 LDky2vnZtPLU3aq5HNQuBY9QNP2WJr2GOe62EqWpiUaEfYN3Xn9MnzLjZd8omTHhif hys2c8jRqJVtqzcG0/8ozJjiIoGR60KpJw7OnB5hG6Jsd0AhFjxaHVfXUfkTeFRbD6 KCAxu85EFsAoJUrsHRXKbgdforvhevbJ/2tZ6/d3hfLLM40ZPAno5jUAx8hkWm9l7y Z18BMSVpPEWmg== Received: by phobos.denx.de (Postfix, from userid 109) id 3052D80EFC; Fri, 26 Feb 2021 08:51:59 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mout-u-204.mailbox.org (mout-u-204.mailbox.org [91.198.250.253]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 852B080059 for ; Fri, 26 Feb 2021 08:51:55 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=sr@denx.de Received: from smtp2.mailbox.org (smtp2.mailbox.org [IPv6:2001:67c:2050:105:465:1:2:0]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-u-204.mailbox.org (Postfix) with ESMTPS id 4Dn2171cppzQlWq; Fri, 26 Feb 2021 08:51:55 +0100 (CET) Received: from smtp2.mailbox.org ([80.241.60.241]) by spamfilter01.heinlein-hosting.de (spamfilter01.heinlein-hosting.de [80.241.56.115]) (amavisd-new, port 10030) with ESMTP id fyE5YlVh64Sk; Fri, 26 Feb 2021 08:51:50 +0100 (CET) From: Stefan Roese To: u-boot@lists.denx.de Cc: Jagannadha Sutradharudu Teki , Jagannadha Sutradharudu Teki , Aaron Williams , Chandrakala Chavva , Andre Przywara , Vignesh Raghavendra , Simon Glass , Mario Six , York Sun , Marek Vasut Subject: [PATCH v2] cfi_flash: Fix detection of 8-bit bus flash devices via address shift Date: Fri, 26 Feb 2021 08:51:49 +0100 Message-Id: <20210226075149.888725-1-sr@denx.de> MIME-Version: 1.0 X-MBO-SPAM-Probability: X-Rspamd-Score: -3.70 / 15.00 / 15.00 X-Rspamd-Queue-Id: 8252017D3 X-Rspamd-UID: 400c45 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean From: Jagannadha Sutradharudu Teki We had a problem detecting 8/16bit flash devices connected only via 8bits to the SoC for quite a while. Commit 239cb9d9 [mtd: cfi_flash: Fix CFI flash driver for 8-bit bus support] finally fixed this 8-bit bus support. But also broke some other boards using this cfi driver. So this patch had to be reverted. I spotted a different, simpler approach for this 8-bit bus support on the barebox mailing list posted by Oleksij Rempel : http://www.spinics.net/lists/u-boot-v2/msg14687.html Here the commit text: " Many cfi chips support 16 and 8 bit modes. Most important difference is use of so called "Q15/A-1" pin. In 16bit mode this pin is used for data IO. In 8bit mode, it is an address input which add one more least significant bit (LSB). In this case we should shift all adresses by one: For example 0xaa << 1 = 0x154 " This patch now is a port of this barebox patch to U-Boot. Along with the change w.r.t from barebox, Some flash chips can support multiple bus widths, override the interface width and limit it to the port width. Tested on 16-bit Spansion flash on sequoia. Tested 8-bit flashes like 256M29EW, 512M29EW. Signed-off-by: Stefan Roese Tested-by: Jagannadha Sutradharudu Teki Cc: Jagannadha Sutradharudu Teki Cc: Aaron Williams Cc: Chandrakala Chavva Cc: Andre Przywara Cc: Vignesh Raghavendra Cc: Simon Glass Cc: Mario Six Cc: York Sun Cc: Marek Vasut --- v2: - Rebase on current mainline I've run into problems with CFI flash on the MIPS Octeon EBB7304, where the CFI detection did not work. While testing and digging through the very old CFI related patches, I stumbled over this patch which fixes the problems on the EBB7304. I would really like to see some further testing of this patch on other boards using CFI parallel flash though. That's why I added some developers who did send CFI related patches in the last few years. So please test with this patch applied if possible. Thanks, Stefan drivers/mtd/cfi_flash.c | 37 +++++++++++++++++++++++++++++++++---- include/flash.h | 2 ++ 2 files changed, 35 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index b4512e3a5f..9642d7c7dc 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -218,7 +218,7 @@ flash_map(flash_info_t *info, flash_sect_t sect, uint offset) { unsigned int byte_offset = offset * info->portwidth; - return (void *)(info->start[sect] + byte_offset); + return (void *)(info->start[sect] + (byte_offset << info->chip_lsb)); } static inline void flash_unmap(flash_info_t *info, flash_sect_t sect, @@ -1918,12 +1918,27 @@ static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry) flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP, sizeof(struct cfi_qry)); info->interface = le16_to_cpu(qry->interface_desc); + /* Some flash chips can support multiple bus widths. + * In this case, override the interface width and + * limit it to the port width. + */ + if ((info->interface == FLASH_CFI_X8X16) && + (info->portwidth == FLASH_CFI_8BIT)) { + debug("Overriding 16-bit interface width to" + " 8-bit port width\n"); + info->interface = FLASH_CFI_X8; + } else if ((info->interface == FLASH_CFI_X16X32) && + (info->portwidth == FLASH_CFI_16BIT)) { + debug("Overriding 16-bit interface width to" + " 16-bit port width\n"); + info->interface = FLASH_CFI_X16; + } info->cfi_offset = flash_offset_cfi[cfi_offset]; debug("device interface is %d\n", info->interface); - debug("found port %d chip %d ", - info->portwidth, info->chipwidth); + debug("found port %d chip %d chip_lsb %d ", + info->portwidth, info->chipwidth, info->chip_lsb); debug("port %d bits chip %d bits\n", info->portwidth << CFI_FLASH_SHIFT_WIDTH, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); @@ -1962,9 +1977,23 @@ static int flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry) info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) { for (info->chipwidth = FLASH_CFI_BY8; info->chipwidth <= info->portwidth; - info->chipwidth <<= 1) + info->chipwidth <<= 1) { + /* + * First, try detection without shifting the addresses + * for 8bit devices (16bit wide connection) + */ + info->chip_lsb = 0; + if (__flash_detect_cfi(info, qry)) + return 1; + + /* + * Not detected, so let's try with shifting + * for 8bit devices + */ + info->chip_lsb = 1; if (__flash_detect_cfi(info, qry)) return 1; + } } debug("not found\n"); return 0; diff --git a/include/flash.h b/include/flash.h index 3bf6b22399..42b18a6047 100644 --- a/include/flash.h +++ b/include/flash.h @@ -24,6 +24,8 @@ typedef struct { #ifdef CONFIG_SYS_FLASH_CFI uchar portwidth; /* the width of the port */ uchar chipwidth; /* the width of the chip */ + uchar chip_lsb; /* extra Least Significant Bit in the */ + /* address of chip */ ushort buffer_size; /* # of bytes in write buffer */ ulong erase_blk_tout; /* maximum block erase timeout */ ulong write_tout; /* maximum write timeout */