diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 4f879c86a2ae..bc00944acdf4 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -56,9 +56,6 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += \
 	kirkwood-ns2lite.dtb \
 	kirkwood-ns2max.dtb \
 	kirkwood-ns2mini.dtb \
-	kirkwood-openrd-base.dtb \
-	kirkwood-openrd-client.dtb \
-	kirkwood-openrd-ultimate.dtb \
 	kirkwood-pogo_e02.dtb \
 	kirkwood-sheevaplug.dtb
 
diff --git a/arch/arm/dts/kirkwood-openrd-base.dts b/arch/arm/dts/kirkwood-openrd-base.dts
deleted file mode 100644
index 094191ece3d7..000000000000
--- a/arch/arm/dts/kirkwood-openrd-base.dts
+++ /dev/null
@@ -1,39 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Marvell OpenRD Base Board Description
- *
- * Andrew Lunn <andrew@lunn.ch>
- *
- * This file contains the definitions that are specific to OpenRD
- * base variant of the Marvell Kirkwood Development Board.
- */
-
-/dts-v1/;
-
-#include "kirkwood-openrd.dtsi"
-
-/ {
-	model = "OpenRD Base";
-	compatible = "marvell,openrd-base", "marvell,openrd", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
-	ocp@f1000000 {
-		serial@12100 {
-			status = "okay";
-		};
-	};
-};
-
-&mdio {
-	status = "okay";
-
-	ethphy0: ethernet-phy@8 {
-		reg = <8>;
-	};
-};
-
-&eth0 {
-	status = "okay";
-	ethernet0-port@0 {
-		phy-handle = <&ethphy0>;
-	};
-};
diff --git a/arch/arm/dts/kirkwood-openrd-client.dts b/arch/arm/dts/kirkwood-openrd-client.dts
deleted file mode 100644
index 74dc23daf646..000000000000
--- a/arch/arm/dts/kirkwood-openrd-client.dts
+++ /dev/null
@@ -1,73 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Marvell OpenRD Client Board Description
- *
- * Andrew Lunn <andrew@lunn.ch>
- *
- * This file contains the definitions that are specific to OpenRD
- * client variant of the Marvell Kirkwood Development Board.
- */
-
-/dts-v1/;
-
-#include "kirkwood-openrd.dtsi"
-
-/ {
-	model = "OpenRD Client";
-	compatible = "marvell,openrd-client", "marvell,openrd", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
-	ocp@f1000000 {
-		audio-controller@a0000 {
-			status = "okay";
-		};
-		i2c@11000 {
-			status = "okay";
-			clock-frequency = <400000>;
-
-			cs42l51: cs42l51@4a {
-				compatible = "cirrus,cs42l51";
-				reg = <0x4a>;
-				#sound-dai-cells = <0>;
-			};
-		};
-	};
-
-	sound {
-		compatible = "simple-audio-card";
-		simple-audio-card,format = "i2s";
-		simple-audio-card,mclk-fs = <256>;
-
-		simple-audio-card,cpu {
-			sound-dai = <&audio0 0>;
-		};
-
-		simple-audio-card,codec {
-			sound-dai = <&cs42l51>;
-		};
-	};
-};
-
-&mdio {
-	status = "okay";
-
-	ethphy0: ethernet-phy@8 {
-		reg = <8>;
-	};
-	ethphy1: ethernet-phy@24 {
-		reg = <24>;
-	};
-};
-
-&eth0 {
-	status = "okay";
-	ethernet0-port@0 {
-		phy-handle = <&ethphy0>;
-	};
-};
-
-&eth1 {
-	status = "okay";
-	ethernet1-port@0 {
-		phy-handle = <&ethphy1>;
-	};
-};
diff --git a/arch/arm/dts/kirkwood-openrd-ultimate.dts b/arch/arm/dts/kirkwood-openrd-ultimate.dts
deleted file mode 100644
index 888e13320c19..000000000000
--- a/arch/arm/dts/kirkwood-openrd-ultimate.dts
+++ /dev/null
@@ -1,55 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Marvell OpenRD Ultimate Board Description
- *
- * Andrew Lunn <andrew@lunn.ch>
- *
- * This file contains the definitions that are specific to OpenRD
- * ultimate variant of the Marvell Kirkwood Development Board.
- */
-
-/dts-v1/;
-
-#include "kirkwood-openrd.dtsi"
-
-/ {
-	model = "OpenRD Ultimate";
-	compatible = "marvell,openrd-ultimate", "marvell,openrd", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
-	ocp@f1000000 {
-		i2c@11000 {
-			status = "okay";
-			clock-frequency = <400000>;
-
-			cs42l51: cs42l51@4a {
-				compatible = "cirrus,cs42l51";
-				reg = <0x4a>;
-			};
-		};
-	};
-};
-
-&mdio {
-	status = "okay";
-
-	ethphy0: ethernet-phy@0 {
-		reg = <0>;
-	};
-	ethphy1: ethernet-phy@1 {
-		reg = <1>;
-	};
-};
-
-&eth0 {
-	status = "okay";
-	ethernet0-port@0 {
-		phy-handle = <&ethphy0>;
-	};
-};
-
-&eth1 {
-	status = "okay";
-	ethernet1-port@0 {
-		phy-handle = <&ethphy1>;
-	};
-};
diff --git a/arch/arm/dts/kirkwood-openrd.dtsi b/arch/arm/dts/kirkwood-openrd.dtsi
deleted file mode 100644
index 47f03c69c55a..000000000000
--- a/arch/arm/dts/kirkwood-openrd.dtsi
+++ /dev/null
@@ -1,122 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Marvell OpenRD (Base|Client|Ultimate) Board Description
- *
- * Andrew Lunn <andrew@lunn.ch>
- *
- * This file contains the definitions that are common between the three
- * variants of the Marvell Kirkwood Development Board.
- */
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
-	memory {
-		device_type = "memory";
-		reg = <0x00000000 0x20000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,115200n8";
-		stdout-path = &uart0;
-	};
-
-	ocp@f1000000 {
-		pinctrl: pin-controller@10000 {
-			pinctrl-0 = <&pmx_select28 &pmx_sdio_cd &pmx_select34>;
-			pinctrl-names = "default";
-
-			pmx_select28: pmx-select-rs232-rs485 {
-				marvell,pins = "mpp28";
-				marvell,function = "gpio";
-			};
-			pmx_sdio_cd: pmx-sdio-cd {
-				marvell,pins = "mpp29";
-				marvell,function = "gpio";
-			};
-			pmx_select34: pmx-select-uart-sd {
-				marvell,pins = "mpp34";
-				marvell,function = "gpio";
-			};
-		};
-		serial@12000 {
-			status = "okay";
-
-		};
-		sata@80000 {
-			status = "okay";
-			nr-ports = <2>;
-		};
-		mvsdio@90000 {
-			status = "okay";
-			cd-gpios = <&gpio0 29 9>;
-		};
-		gpio@10100 {
-			p28 {
-				gpio-hog;
-				gpios = <28 GPIO_ACTIVE_HIGH>;
-				/*
-				 * SelRS232or485 selects between RS-232 or RS-485
-				 * mode for the second UART.
-				 *
-				 * Low: RS-232
-				 * High: RS-485
-				 *
-				 * To use the second UART, you need to change also
-				 * the SelUARTorSD.
-				 */
-				output-low;
-				line-name = "SelRS232or485";
-			};
-		};
-		gpio@10140 {
-			p2 {
-				gpio-hog;
-				gpios = <2 GPIO_ACTIVE_HIGH>;
-				/*
-				 * SelUARTorSD selects between the second UART
-				 * (serial@12100) and SD (mvsdio@90000).
-				 *
-				 * Low: UART
-				 * High: SD
-				 *
-				 * When changing this line make sure the newly
-				 * selected device node is enabled and the
-				 * previously selected device node is disabled.
-				 */
-				output-high; /* Select SD by default */
-				line-name = "SelUARTorSD";
-			};
-		};
-	};
-};
-
-&nand {
-	status = "okay";
-	pinctrl-0 = <&pmx_nand>;
-	pinctrl-names = "default";
-
-	partition@0 {
-		label = "u-boot";
-		reg = <0x0000000 0x100000>;
-	};
-
-	partition@100000 {
-		label = "uImage";
-		reg = <0x0100000 0x400000>;
-	};
-
-	partition@600000 {
-		label = "root";
-		reg = <0x0600000 0x1FA00000>;
-	};
-};
-
-&pciec {
-	status = "okay";
-};
-
-&pcie0 {
-	status = "okay";
-};
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index cb4e9f29ef6d..67f36a9a6318 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -4,9 +4,6 @@ choice
 	prompt "Marvell Kirkwood board select"
 	optional
 
-config TARGET_OPENRD
-	bool "Marvell OpenRD Board"
-
 config TARGET_DREAMPLUG
 	bool "DreamPlug Board"
 
@@ -67,7 +64,6 @@ endchoice
 config SYS_SOC
 	default "kirkwood"
 
-source "board/Marvell/openrd/Kconfig"
 source "board/Marvell/dreamplug/Kconfig"
 source "board/Synology/ds109/Kconfig"
 source "board/Marvell/guruplug/Kconfig"
diff --git a/board/Marvell/openrd/Kconfig b/board/Marvell/openrd/Kconfig
deleted file mode 100644
index 124b66da0f13..000000000000
--- a/board/Marvell/openrd/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_OPENRD
-
-config SYS_BOARD
-	default "openrd"
-
-config SYS_VENDOR
-	default "Marvell"
-
-config SYS_CONFIG_NAME
-	default "openrd"
-
-endif
diff --git a/board/Marvell/openrd/MAINTAINERS b/board/Marvell/openrd/MAINTAINERS
deleted file mode 100644
index 8170452b44aa..000000000000
--- a/board/Marvell/openrd/MAINTAINERS
+++ /dev/null
@@ -1,8 +0,0 @@
-OPENRD / OPENRD_CLIENT BOARD
-M:	Stefan Roese <sr@denx.de>
-S:	Maintained
-F:	board/Marvell/openrd/
-F:	include/configs/openrd.h
-F:	configs/openrd_base_defconfig
-F:	configs/openrd_client_defconfig
-F:	configs/openrd_ultimate_defconfig
diff --git a/board/Marvell/openrd/Makefile b/board/Marvell/openrd/Makefile
deleted file mode 100644
index ecebb421f703..000000000000
--- a/board/Marvell/openrd/Makefile
+++ /dev/null
@@ -1,12 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2009
-# Net Insight <www.netinsight.net>
-# Written-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
-#
-# Based on sheevaplug:
-# (C) Copyright 2009
-# Marvell Semiconductor <www.marvell.com>
-# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
-
-obj-y	:= openrd.o
diff --git a/board/Marvell/openrd/kwbimage.cfg b/board/Marvell/openrd/kwbimage.cfg
deleted file mode 100644
index 356fd46f933d..000000000000
--- a/board/Marvell/openrd/kwbimage.cfg
+++ /dev/null
@@ -1,150 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2009
-# Marvell Semiconductor <www.marvell.com>
-# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
-# Refer doc/README.kwbimage for more details about how-to configure
-# and create kirkwood boot image
-#
-
-# Boot Media configurations
-BOOT_FROM	nand
-NAND_ECC_MODE	default
-NAND_PAGE_SIZE	0x0800
-
-# SOC registers configuration using bootrom header extension
-# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
-
-# Configure RGMII-0 interface pad voltage to 1.8V
-DATA 0xFFD100e0 0x1b1b1b9b
-
-#Dram initalization for SINGLE x16 CL=5 @ 400MHz
-DATA 0xFFD01400 0x43000c30	# DDR Configuration register
-# bit13-0:  0xc30 (3120 DDR2 clks refresh rate)
-# bit23-14: zero
-# bit24: 1= enable exit self refresh mode on DDR access
-# bit25: 1 required
-# bit29-26: zero
-# bit31-30: 01
-
-DATA 0xFFD01404 0x37543000	# DDR Controller Control Low
-# bit 4:    0=addr/cmd in smame cycle
-# bit 5:    0=clk is driven during self refresh, we don't care for APX
-# bit 6:    0=use recommended falling edge of clk for addr/cmd
-# bit14:    0=input buffer always powered up
-# bit18:    1=cpu lock transaction enabled
-# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0
-# bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM
-# bit30-28: 3 required
-# bit31:    0=no additional STARTBURST delay
-
-DATA 0xFFD01408 0x22125451	# DDR Timing (Low) (active cycles value +1)
-# bit3-0:   TRAS lsbs
-# bit7-4:   TRCD
-# bit11- 8: TRP
-# bit15-12: TWR
-# bit19-16: TWTR
-# bit20:    TRAS msb
-# bit23-21: 0x0
-# bit27-24: TRRD
-# bit31-28: TRTP
-
-DATA 0xFFD0140C 0x00000a33	#  DDR Timing (High)
-# bit6-0:   TRFC
-# bit8-7:   TR2R
-# bit10-9:  TR2W
-# bit12-11: TW2W
-# bit31-13: zero required
-
-DATA 0xFFD01410 0x000000cc	#  DDR Address Control
-# bit1-0:   00, Cs0width=x8
-# bit3-2:   11, Cs0size=1Gb
-# bit5-4:   00, Cs1width=x8
-# bit7-6:   11, Cs1size=1Gb
-# bit9-8:   00, Cs2width=nonexistent
-# bit11-10: 00, Cs2size =nonexistent
-# bit13-12: 00, Cs3width=nonexistent
-# bit15-14: 00, Cs3size =nonexistent
-# bit16:    0,  Cs0AddrSel
-# bit17:    0,  Cs1AddrSel
-# bit18:    0,  Cs2AddrSel
-# bit19:    0,  Cs3AddrSel
-# bit31-20: 0 required
-
-DATA 0xFFD01414 0x00000000	#  DDR Open Pages Control
-# bit0:    0,  OpenPage enabled
-# bit31-1: 0 required
-
-DATA 0xFFD01418 0x00000000	#  DDR Operation
-# bit3-0:   0x0, DDR cmd
-# bit31-4:  0 required
-
-DATA 0xFFD0141C 0x00000C52	#  DDR Mode
-# bit2-0:   2, BurstLen=2 required
-# bit3:     0, BurstType=0 required
-# bit6-4:   4, CL=5
-# bit7:     0, TestMode=0 normal
-# bit8:     0, DLL reset=0 normal
-# bit11-9:  6, auto-precharge write recovery ????????????
-# bit12:    0, PD must be zero
-# bit31-13: 0 required
-
-DATA 0xFFD01420 0x00000042	#  DDR Extended Mode
-# bit0:    0,  DDR DLL enabled
-# bit1:    1,  DDR drive strength reduced
-# bit2:    0,  DDR ODT control lsd (disabled)
-# bit5-3:  000, required
-# bit6:    1,  DDR ODT control msb, (disabled)
-# bit9-7:  000, required
-# bit10:   0,  differential DQS enabled
-# bit11:   0, required
-# bit12:   0, DDR output buffer enabled
-# bit31-13: 0 required
-
-DATA 0xFFD01424 0x0000F17F	#  DDR Controller Control High
-# bit2-0:  111, required
-# bit3  :  1  , MBUS Burst Chop disabled
-# bit6-4:  111, required
-# bit7  :  0
-# bit8  :  1  , add writepath sample stage, must be 1 for DDR freq >= 300MHz
-# bit9  :  0  , no half clock cycle addition to dataout
-# bit10 :  0  , 1/4 clock cycle skew enabled for addr/ctl signals
-# bit11 :  0  , 1/4 clock cycle skew disabled for write mesh
-# bit15-12: 1111 required
-# bit31-16: 0    required
-
-DATA 0xFFD01428 0x00085520	# DDR2 ODT Read Timing (default values)
-DATA 0xFFD0147C 0x00008552	# DDR2 ODT Write Timing (default values)
-
-DATA 0xFFD01500 0x00000000	# CS[0]n Base address to 0x0
-DATA 0xFFD01504 0x0FFFFFF1	# CS[0]n Size
-# bit0:    1,  Window enabled
-# bit1:    0,  Write Protect disabled
-# bit3-2:  00, CS0 hit selected
-# bit23-4: ones, required
-# bit31-24: 0x0F, Size (i.e. 256MB)
-
-DATA 0xFFD01508 0x10000000	# CS[1]n Base address to 256Mb
-DATA 0xFFD0150C 0x0FFFFFF5	# CS[1]n Size 256Mb Window enabled for CS1
-
-DATA 0xFFD01514 0x00000000	# CS[2]n Size, window disabled
-DATA 0xFFD0151C 0x00000000	# CS[3]n Size, window disabled
-
-DATA 0xFFD01494 0x00120012	#  DDR ODT Control (Low)
-# bit3-0:   0010, (read) M_ODT[0] is asserted during read from DRAM CS1
-# bit7-4:   0001, (read) M_ODT[1] is asserted during read from DRAM CS0
-# bit19-16: 0010, (write) M_ODT[0] is asserted during write to DRAM CS1.
-# bit23-20: 0001, (write) M_ODT[1] is asserted during write to DRAM CS0.
-DATA 0xFFD01498 0x00000000	#  DDR ODT Control (High)
-
-DATA 0xFFD0149C 0x0000E40f	# CPU ODT Control
-# bit3-0:    1111, internal ODT is asserted during read from DRAM bank 0-3
-# bit11-10:    01, M_DQ, M_DM, and M_DQS I/O buffer ODT Select: 150 ohm
-# bit13-12:    10, M_STARTBURST_IN I/O buffer ODT Select: 75 ohm
-# bit14:        1, M_STARTBURST_IN ODT: Enabled
-# bit15:        1, DDR IO ODT Unit: Use ODT block
-DATA 0xFFD01480 0x00000001	# DDR Initialization Control
-#bit0=1, enable DDR init upon this register write
-
-# End of Header extension
-DATA 0x0 0x0
diff --git a/board/Marvell/openrd/openrd.c b/board/Marvell/openrd/openrd.c
deleted file mode 100644
index f44ac3315ebc..000000000000
--- a/board/Marvell/openrd/openrd.c
+++ /dev/null
@@ -1,163 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2009
- * Net Insight <www.netinsight.net>
- * Written-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
- *
- * Based on sheevaplug.c:
- * (C) Copyright 2009
- * Marvell Semiconductor <www.marvell.com>
- * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
- */
-
-#include <common.h>
-#include <init.h>
-#include <miiphy.h>
-#include <net.h>
-#include <asm/global_data.h>
-#include <asm/mach-types.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/soc.h>
-#include <asm/arch/mpp.h>
-#include "openrd.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_early_init_f(void)
-{
-	/*
-	 * default gpio configuration
-	 * There are maximum 64 gpios controlled through 2 sets of registers
-	 * the  below configuration configures mainly initial LED status
-	 */
-	mvebu_config_gpio(OPENRD_OE_VAL_LOW,
-			  OPENRD_OE_VAL_HIGH,
-			  OPENRD_OE_LOW, OPENRD_OE_HIGH);
-
-	/* Multi-Purpose Pins Functionality configuration */
-	static const u32 kwmpp_config[] = {
-		MPP0_NF_IO2,
-		MPP1_NF_IO3,
-		MPP2_NF_IO4,
-		MPP3_NF_IO5,
-		MPP4_NF_IO6,
-		MPP5_NF_IO7,
-		MPP6_SYSRST_OUTn,
-		MPP7_GPO,
-		MPP8_TW_SDA,
-		MPP9_TW_SCK,
-		MPP10_UART0_TXD,
-		MPP11_UART0_RXD,
-		MPP12_SD_CLK,
-		MPP13_SD_CMD, /* Alt UART1_TXD */
-		MPP14_SD_D0,  /* Alt UART1_RXD */
-		MPP15_SD_D1,
-		MPP16_SD_D2,
-		MPP17_SD_D3,
-		MPP18_NF_IO0,
-		MPP19_NF_IO1,
-		MPP20_GE1_0,
-		MPP21_GE1_1,
-		MPP22_GE1_2,
-		MPP23_GE1_3,
-		MPP24_GE1_4,
-		MPP25_GE1_5,
-		MPP26_GE1_6,
-		MPP27_GE1_7,
-		MPP28_GPIO,
-		MPP29_TSMP9,
-		MPP30_GE1_10,
-		MPP31_GE1_11,
-		MPP32_GE1_12,
-		MPP33_GE1_13,
-		MPP34_GPIO,   /* UART1 / SD sel */
-		MPP35_TDM_CH0_TX_QL,
-		MPP36_TDM_SPI_CS1,
-		MPP37_TDM_CH2_TX_QL,
-		MPP38_TDM_CH2_RX_QL,
-		MPP39_AUDIO_I2SBCLK,
-		MPP40_AUDIO_I2SDO,
-		MPP41_AUDIO_I2SLRC,
-		MPP42_AUDIO_I2SMCLK,
-		MPP43_AUDIO_I2SDI,
-		MPP44_AUDIO_EXTCLK,
-		MPP45_TDM_PCLK,
-		MPP46_TDM_FS,
-		MPP47_TDM_DRX,
-		MPP48_TDM_DTX,
-		MPP49_TDM_CH0_RX_QL,
-		0
-	};
-
-	kirkwood_mpp_conf(kwmpp_config, NULL);
-	return 0;
-}
-
-int board_init(void)
-{
-	/*
-	 * arch number of board
-	 */
-#if defined(CONFIG_BOARD_IS_OPENRD_BASE)
-	gd->bd->bi_arch_number = MACH_TYPE_OPENRD_BASE;
-#elif defined(CONFIG_BOARD_IS_OPENRD_CLIENT)
-	gd->bd->bi_arch_number = MACH_TYPE_OPENRD_CLIENT;
-#elif defined(CONFIG_BOARD_IS_OPENRD_ULTIMATE)
-	gd->bd->bi_arch_number = MACH_TYPE_OPENRD_ULTIMATE;
-#endif
-
-	/* adress of boot parameters */
-	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
-	return 0;
-}
-
-#ifdef CONFIG_RESET_PHY_R
-/* Configure and enable MV88E1116/88E1121 PHY */
-void mv_phy_init(char *name)
-{
-	u16 reg;
-	u16 devadr;
-
-	if (miiphy_set_current_dev(name))
-		return;
-
-	/* command to read PHY dev address */
-	if (miiphy_read(name, 0xEE, 0xEE, (u16 *)&devadr)) {
-		printf("Err..%s could not read PHY dev address\n", __func__);
-		return;
-	}
-
-	/*
-	 * Enable RGMII delay on Tx and Rx for CPU port
-	 * Ref: sec 4.7.2 of chip datasheet
-	 */
-	miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
-	miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg);
-	reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
-	miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
-	miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
-
-	/* reset the phy */
-	miiphy_reset(name, devadr);
-
-	printf(PHY_NO" Initialized on %s\n", name);
-}
-
-void reset_phy(void)
-{
-	mv_phy_init("egiga0");
-
-#ifdef CONFIG_BOARD_IS_OPENRD_CLIENT
-	/* Kirkwood ethernet driver is written with the assumption that in case
-	 * of multiple PHYs, their addresses are consecutive. But unfortunately
-	 * in case of OpenRD-Client, PHY addresses are not consecutive.*/
-	miiphy_write("egiga1", 0xEE, 0xEE, 24);
-#endif
-
-#if defined(CONFIG_BOARD_IS_OPENRD_CLIENT) || \
-	defined(CONFIG_BOARD_IS_OPENRD_ULTIMATE)
-	/* configure and initialize both PHY's */
-	mv_phy_init("egiga1");
-#endif
-}
-#endif /* CONFIG_RESET_PHY_R */
diff --git a/board/Marvell/openrd/openrd.h b/board/Marvell/openrd/openrd.h
deleted file mode 100644
index ade8d2739263..000000000000
--- a/board/Marvell/openrd/openrd.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2009
- * Net Insight <www.netinsight.net>
- * Written-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
- *
- * Based on sheevaplug.h:
- * (C) Copyright 2009
- * Marvell Semiconductor <www.marvell.com>
- * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
- */
-
-#ifndef __OPENRD_BASE_H
-#define __OPENRD_BASE_H
-
-#define OPENRD_OE_LOW		(~(1<<28))        /* RS232 / RS485 */
-#define OPENRD_OE_HIGH		(~(1<<2))         /* SD / UART1 */
-#define OPENRD_OE_VAL_LOW		(0)       /* Sel RS232 */
-#define OPENRD_OE_VAL_HIGH		(1 << 2)  /* Sel SD */
-
-/* PHY related */
-#define MV88E1116_LED_FCTRL_REG		10
-#define MV88E1116_CPRSP_CR3_REG		21
-#define MV88E1116_MAC_CTRL_REG		21
-#define MV88E1116_PGADR_REG		22
-#define MV88E1116_RGMII_TXTM_CTRL	(1 << 4)
-#define MV88E1116_RGMII_RXTM_CTRL	(1 << 5)
-
-#endif /* __OPENRD_BASE_H */
diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig
deleted file mode 100644
index ebe22ab877d9..000000000000
--- a/configs/openrd_base_defconfig
+++ /dev/null
@@ -1,49 +0,0 @@
-CONFIG_ARM=y
-CONFIG_SYS_DCACHE_OFF=y
-CONFIG_ARCH_CPU_INIT=y
-CONFIG_SYS_THUMB_BUILD=y
-CONFIG_ARCH_KIRKWOOD=y
-CONFIG_SYS_TEXT_BASE=0x600000
-CONFIG_NR_DRAM_BANKS=2
-CONFIG_TARGET_OPENRD=y
-CONFIG_ENV_SIZE=0x20000
-CONFIG_ENV_OFFSET=0x80000
-CONFIG_IDENT_STRING="\nOpenRD-Base"
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-base"
-CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_BASE"
-CONFIG_BOOTDELAY=3
-CONFIG_USE_PREBOOT=y
-CONFIG_LOGLEVEL=2
-# CONFIG_DISPLAY_BOARDINFO is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_IDE=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_JFFS2=y
-CONFIG_CMD_MTDPARTS=y
-CONFIG_MTDIDS_DEFAULT="nand0=nand_mtd"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=nand_mtd:0x100000@0x000000(uboot),0x400000@0x100000(uImage),0x1fb00000@0x500000(rootfs)"
-CONFIG_CMD_UBI=y
-CONFIG_ISO_PARTITION=y
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_NAND=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NETCONSOLE=y
-CONFIG_MVSATA_IDE=y
-# CONFIG_MMC_HW_PARTITIONING is not set
-CONFIG_MTD=y
-CONFIG_MTD_RAW_NAND=y
-CONFIG_MVGBE=y
-CONFIG_MII=y
-CONFIG_SYS_NS16550=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_STORAGE=y
diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig
deleted file mode 100644
index 04fcea2d0d4f..000000000000
--- a/configs/openrd_client_defconfig
+++ /dev/null
@@ -1,49 +0,0 @@
-CONFIG_ARM=y
-CONFIG_SYS_DCACHE_OFF=y
-CONFIG_ARCH_CPU_INIT=y
-CONFIG_SYS_THUMB_BUILD=y
-CONFIG_ARCH_KIRKWOOD=y
-CONFIG_SYS_TEXT_BASE=0x600000
-CONFIG_NR_DRAM_BANKS=2
-CONFIG_TARGET_OPENRD=y
-CONFIG_ENV_SIZE=0x20000
-CONFIG_ENV_OFFSET=0x80000
-CONFIG_IDENT_STRING="\nOpenRD-Client"
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-client"
-CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_CLIENT"
-CONFIG_BOOTDELAY=3
-CONFIG_USE_PREBOOT=y
-CONFIG_LOGLEVEL=2
-# CONFIG_DISPLAY_BOARDINFO is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_IDE=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_JFFS2=y
-CONFIG_CMD_MTDPARTS=y
-CONFIG_MTDIDS_DEFAULT="nand0=nand_mtd"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=nand_mtd:0x100000@0x000000(uboot),0x400000@0x100000(uImage),0x1fb00000@0x500000(rootfs)"
-CONFIG_CMD_UBI=y
-CONFIG_ISO_PARTITION=y
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_NAND=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NETCONSOLE=y
-CONFIG_MVSATA_IDE=y
-# CONFIG_MMC_HW_PARTITIONING is not set
-CONFIG_MTD=y
-CONFIG_MTD_RAW_NAND=y
-CONFIG_MVGBE=y
-CONFIG_MII=y
-CONFIG_SYS_NS16550=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_STORAGE=y
diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig
deleted file mode 100644
index de7526dd7086..000000000000
--- a/configs/openrd_ultimate_defconfig
+++ /dev/null
@@ -1,49 +0,0 @@
-CONFIG_ARM=y
-CONFIG_SYS_DCACHE_OFF=y
-CONFIG_ARCH_CPU_INIT=y
-CONFIG_SYS_THUMB_BUILD=y
-CONFIG_ARCH_KIRKWOOD=y
-CONFIG_SYS_TEXT_BASE=0x600000
-CONFIG_NR_DRAM_BANKS=2
-CONFIG_TARGET_OPENRD=y
-CONFIG_ENV_SIZE=0x20000
-CONFIG_ENV_OFFSET=0x80000
-CONFIG_IDENT_STRING="\nOpenRD-Ultimate"
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-ultimate"
-CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_ULTIMATE"
-CONFIG_BOOTDELAY=3
-CONFIG_USE_PREBOOT=y
-CONFIG_LOGLEVEL=2
-# CONFIG_DISPLAY_BOARDINFO is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_IDE=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_JFFS2=y
-CONFIG_CMD_MTDPARTS=y
-CONFIG_MTDIDS_DEFAULT="nand0=nand_mtd"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=nand_mtd:0x100000@0x000000(uboot),0x400000@0x100000(uImage),0x1fb00000@0x500000(rootfs)"
-CONFIG_CMD_UBI=y
-CONFIG_ISO_PARTITION=y
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_NAND=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NETCONSOLE=y
-CONFIG_MVSATA_IDE=y
-# CONFIG_MMC_HW_PARTITIONING is not set
-CONFIG_MTD=y
-CONFIG_MTD_RAW_NAND=y
-CONFIG_MVGBE=y
-CONFIG_MII=y
-CONFIG_SYS_NS16550=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_STORAGE=y
diff --git a/include/configs/openrd.h b/include/configs/openrd.h
deleted file mode 100644
index e9fd0fc749ba..000000000000
--- a/include/configs/openrd.h
+++ /dev/null
@@ -1,82 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2009
- * Net Insight <www.netinsight.net>
- * Written-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
- *
- * Based on sheevaplug.h:
- * (C) Copyright 2009
- * Marvell Semiconductor <www.marvell.com>
- * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
- */
-
-#ifndef _CONFIG_OPENRD_H
-#define _CONFIG_OPENRD_H
-
-/*
- * High Level Configuration Options (easy to change)
- */
-#define CONFIG_SHEEVA_88SV131	1	/* CPU Core subversion */
-#define CONFIG_KW88F6281	1	/* SOC Name */
-#define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
-
-#include "mv-common.h"
-
-/*
- *  Environment variables configurations
- */
-/*
- * max 4k env size is enough, but in case of nand
- * it has to be rounded to sector size
- */
-/*
- * Environment is right behind U-Boot in flash. Make sure U-Boot
- * doesn't grow into the environment area.
- */
-#define CONFIG_BOARD_SIZE_LIMIT		CONFIG_ENV_OFFSET
-
-/*
- * Default environment variables
- */
-#define CONFIG_BOOTCOMMAND		"${x_bootcmd_kernel}; "	\
-	"setenv bootargs ${x_bootargs} ${x_bootargs_root}; "	\
-	"${x_bootcmd_usb}; bootm 0x6400000;"
-
-#define CONFIG_EXTRA_ENV_SETTINGS	"x_bootargs=console=ttyS0,115200 " \
-	CONFIG_MTDPARTS_DEFAULT " rw ubi.mtd=2,2048\0" \
-	"x_bootcmd_kernel=nand read 0x6400000 0x100000 0x300000\0"	\
-	"x_bootcmd_usb=usb start\0"					\
-	"x_bootargs_root=root=ubi0:rootfs rootfstype=ubifs\0"
-
-/*
- * Ethernet Driver configuration
- */
-#ifdef CONFIG_CMD_NET
-# ifdef CONFIG_BOARD_IS_OPENRD_BASE
-#  define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
-# else
-#  define CONFIG_MVGBE_PORTS	{1, 1}	/* enable both ports */
-# endif
-# ifdef CONFIG_BOARD_IS_OPENRD_ULTIMATE
-#  define CONFIG_PHY_BASE_ADR	0x0
-#  define PHY_NO		"88E1121"
-# else
-#  define CONFIG_PHY_BASE_ADR	0x8
-#  define PHY_NO		"88E1116"
-# endif
-#endif /* CONFIG_CMD_NET */
-
-/*
- * SATA Driver configuration
- */
-#ifdef CONFIG_MVSATA_IDE
-#define CONFIG_SYS_ATA_IDE0_OFFSET	MV_SATA_PORT0_OFFSET
-#define CONFIG_SYS_ATA_IDE1_OFFSET	MV_SATA_PORT1_OFFSET
-#endif /*CONFIG_MVSATA_IDE*/
-
-#ifdef CONFIG_CMD_MMC
-#define CONFIG_MVEBU_MMC
-#define CONFIG_SYS_MMC_BASE KW_SDIO_BASE
-#endif /* CONFIG_CMD_MMC */
-
-#endif /* _CONFIG_OPENRD_BASE_H */
