diff mbox series

[23/57] arm: Remove udoo and udoo_neo boards

Message ID 20210221010634.21310-24-trini@konsulko.com
State Rejected
Delegated to: Tom Rini
Headers show
Series Enforce DM_MMC migration and remove platforms | expand

Commit Message

Tom Rini Feb. 21, 2021, 1:06 a.m. UTC
These boards have not been converted to CONFIG_DM_MMC by the deadline.
Remove them.

Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Francesco Montefoschi <francesco.montefoschi@udoo.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
---
 arch/arm/mach-imx/mx6/Kconfig |  17 -
 board/udoo/Kconfig            |   9 -
 board/udoo/MAINTAINERS        |   6 -
 board/udoo/Makefile           |   5 -
 board/udoo/README             |  21 --
 board/udoo/neo/Kconfig        |  12 -
 board/udoo/neo/MAINTAINERS    |   7 -
 board/udoo/neo/Makefile       |   4 -
 board/udoo/neo/neo.c          | 600 ----------------------------------
 board/udoo/udoo.c             | 276 ----------------
 board/udoo/udoo_spl.c         | 257 ---------------
 configs/udoo_defconfig        |  45 ---
 configs/udoo_neo_defconfig    |  42 ---
 include/configs/udoo.h        |  88 -----
 include/configs/udoo_neo.h    |  96 ------
 15 files changed, 1485 deletions(-)
 delete mode 100644 board/udoo/Kconfig
 delete mode 100644 board/udoo/MAINTAINERS
 delete mode 100644 board/udoo/Makefile
 delete mode 100644 board/udoo/README
 delete mode 100644 board/udoo/neo/Kconfig
 delete mode 100644 board/udoo/neo/MAINTAINERS
 delete mode 100644 board/udoo/neo/Makefile
 delete mode 100644 board/udoo/neo/neo.c
 delete mode 100644 board/udoo/udoo.c
 delete mode 100644 board/udoo/udoo_spl.c
 delete mode 100644 configs/udoo_defconfig
 delete mode 100644 configs/udoo_neo_defconfig
 delete mode 100644 include/configs/udoo.h
 delete mode 100644 include/configs/udoo_neo.h
diff mbox series

Patch

diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index 83c5df416572..1b7090958bd2 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -599,21 +599,6 @@  config TARGET_TQMA6
 	imply CMD_SF
 	imply CMD_DM
 
-config TARGET_UDOO
-	bool "udoo"
-	depends on MX6QDL
-	select BOARD_LATE_INIT
-	select SUPPORT_SPL
-
-config TARGET_UDOO_NEO
-	bool "UDOO Neo"
-	depends on MX6SX
-	select BOARD_LATE_INIT
-	select DM
-	select DM_THERMAL
-	select SUPPORT_SPL
-	imply CMD_DM
-
 config TARGET_SOFTING_VINING_2000
 	bool "Softing VIN|ING 2000"
 	depends on MX6SX
@@ -722,8 +707,6 @@  source "board/toradex/apalis_imx6/Kconfig"
 source "board/toradex/colibri_imx6/Kconfig"
 source "board/toradex/colibri-imx6ull/Kconfig"
 source "board/k+p/kp_imx6q_tpc/Kconfig"
-source "board/udoo/Kconfig"
-source "board/udoo/neo/Kconfig"
 source "board/wandboard/Kconfig"
 source "board/BuR/brppt2/Kconfig"
 
diff --git a/board/udoo/Kconfig b/board/udoo/Kconfig
deleted file mode 100644
index 78617a21383c..000000000000
--- a/board/udoo/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@ 
-if TARGET_UDOO
-
-config SYS_BOARD
-	default "udoo"
-
-config SYS_CONFIG_NAME
-	default "udoo"
-
-endif
diff --git a/board/udoo/MAINTAINERS b/board/udoo/MAINTAINERS
deleted file mode 100644
index b05243c429d3..000000000000
--- a/board/udoo/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@ 
-UDOO BOARD
-M:	Fabio Estevam <fabio.estevam@nxp.com>
-S:	Maintained
-F:	board/udoo/
-F:	include/configs/udoo.h
-F:	configs/udoo_defconfig
diff --git a/board/udoo/Makefile b/board/udoo/Makefile
deleted file mode 100644
index 66f67f7c154e..000000000000
--- a/board/udoo/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@ 
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2013 Freescale Semiconductor, Inc.
-
-obj-y  := udoo.o udoo_spl.o
diff --git a/board/udoo/README b/board/udoo/README
deleted file mode 100644
index 6fbcc598f77b..000000000000
--- a/board/udoo/README
+++ /dev/null
@@ -1,21 +0,0 @@ 
-How to use U-Boot on MX6Q/DL Udoo boards
-----------------------------------------
-
-- Build U-Boot for MX6Q/DL Udoo boards:
-
-$ make mrproper
-$ make udoo_defconfig
-$ make
-
-This will generate the SPL image called SPL and the u-boot.img.
-
-- Flash the SPL image into the SD card:
-
-sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync
-
-- Flash the u-boot.img image into the SD card:
-
-sudo dd if=u-boot.img of=/dev/mmcblk0 bs=1k seek=69; sync
-
-- Insert the SD card in the board, power it up and U-Boot messages should
-come up.
diff --git a/board/udoo/neo/Kconfig b/board/udoo/neo/Kconfig
deleted file mode 100644
index 8f474df24874..000000000000
--- a/board/udoo/neo/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@ 
-if TARGET_UDOO_NEO
-
-config SYS_VENDOR
-	default "udoo"
-
-config SYS_BOARD
-	default "neo"
-
-config SYS_CONFIG_NAME
-	default "udoo_neo"
-
-endif
diff --git a/board/udoo/neo/MAINTAINERS b/board/udoo/neo/MAINTAINERS
deleted file mode 100644
index 743fe33d0597..000000000000
--- a/board/udoo/neo/MAINTAINERS
+++ /dev/null
@@ -1,7 +0,0 @@ 
-UDOO NEO BOARD
-M:	Breno Lima <breno.lima@nxp.com>
-M:	Francesco Montefoschi <francesco.montefoschi@udoo.org>
-S:	Maintained
-F:	board/udoo/neo/
-F:	include/configs/udoo_neo.h
-F:	configs/udoo_neo_defconfig
diff --git a/board/udoo/neo/Makefile b/board/udoo/neo/Makefile
deleted file mode 100644
index 831c084ce596..000000000000
--- a/board/udoo/neo/Makefile
+++ /dev/null
@@ -1,4 +0,0 @@ 
-# SPDX-License-Identifier: GPL-2.0+
-# (C) Copyright 2015 UDOO Team
-
-obj-y  := neo.o
diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c
deleted file mode 100644
index 653ca1ca5a62..000000000000
--- a/board/udoo/neo/neo.c
+++ /dev/null
@@ -1,600 +0,0 @@ 
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2014-2015 Freescale Semiconductor, Inc.
- * Copyright (C) Jasbir Matharu
- * Copyright (C) UDOO Team
- *
- * Author: Breno Lima <breno.lima@nxp.com>
- * Author: Francesco Montefoschi <francesco.monte@gmail.com>
- */
-
-#include <init.h>
-#include <net.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/crm_regs.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/iomux.h>
-#include <asm/arch/mx6-pins.h>
-#include <asm/global_data.h>
-#include <asm/gpio.h>
-#include <asm/mach-imx/iomux-v3.h>
-#include <env.h>
-#include <mmc.h>
-#include <fsl_esdhc_imx.h>
-#include <asm/arch/crm_regs.h>
-#include <asm/io.h>
-#include <asm/mach-imx/mxc_i2c.h>
-#include <asm/arch/sys_proto.h>
-#include <spl.h>
-#include <linux/delay.h>
-#include <linux/sizes.h>
-#include <common.h>
-#include <i2c.h>
-#include <miiphy.h>
-#include <netdev.h>
-#include <power/pmic.h>
-#include <power/pfuze3000_pmic.h>
-#include <malloc.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-enum {
-	UDOO_NEO_TYPE_BASIC,
-	UDOO_NEO_TYPE_BASIC_KS,
-	UDOO_NEO_TYPE_FULL,
-	UDOO_NEO_TYPE_EXTENDED,
-};
-
-#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |		\
-	PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |		\
-	PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
-
-#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |		\
-	PAD_CTL_PUS_22K_UP  | PAD_CTL_SPEED_LOW |		\
-	PAD_CTL_DSE_80ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
-
-#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |		\
-	PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |		\
-	PAD_CTL_DSE_40ohm | PAD_CTL_HYS |		\
-	PAD_CTL_ODE)
-
-#define ENET_PAD_CTRL  (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE |     \
-	PAD_CTL_SPEED_MED   |                                   \
-	PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST)
-
-#define ENET_CLK_PAD_CTRL  (PAD_CTL_SPEED_MED | \
-	PAD_CTL_DSE_120ohm   | PAD_CTL_SRE_FAST)
-
-#define ENET_RX_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |          \
-	PAD_CTL_SPEED_MED   | PAD_CTL_SRE_FAST)
-
-#define WDOG_PAD_CTRL (PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_SPEED_MED |	\
-	PAD_CTL_DSE_40ohm)
-
-#define BOARD_DETECT_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |		\
-	PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |		\
-	PAD_CTL_DSE_34ohm | PAD_CTL_HYS | PAD_CTL_SRE_FAST)
-#define BOARD_DETECT_PAD_CFG (MUX_PAD_CTRL(BOARD_DETECT_PAD_CTRL) |	\
-	MUX_MODE_SION)
-
-int dram_init(void)
-{
-	gd->ram_size = imx_ddr_size();
-	return 0;
-}
-
-#ifdef CONFIG_SYS_I2C_MXC
-#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
-/* I2C1 for PMIC */
-static struct i2c_pads_info i2c_pad_info1 = {
-	.scl = {
-		.i2c_mode = MX6_PAD_GPIO1_IO00__I2C1_SCL | PC,
-		.gpio_mode = MX6_PAD_GPIO1_IO00__GPIO1_IO_0 | PC,
-		.gp = IMX_GPIO_NR(1, 0),
-	},
-	.sda = {
-		.i2c_mode = MX6_PAD_GPIO1_IO01__I2C1_SDA | PC,
-		.gpio_mode = MX6_PAD_GPIO1_IO01__GPIO1_IO_1 | PC,
-		.gp = IMX_GPIO_NR(1, 1),
-	},
-};
-#endif
-
-#ifdef CONFIG_POWER
-int power_init_board(void)
-{
-	struct pmic *p;
-	int ret;
-	unsigned int reg, rev_id;
-
-	ret = power_pfuze3000_init(PFUZE3000_I2C_BUS);
-	if (ret)
-		return ret;
-
-	p = pmic_get("PFUZE3000");
-	ret = pmic_probe(p);
-	if (ret)
-		return ret;
-
-	pmic_reg_read(p, PFUZE3000_DEVICEID, &reg);
-	pmic_reg_read(p, PFUZE3000_REVID, &rev_id);
-	printf("PMIC:  PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", reg, rev_id);
-
-	/* disable Low Power Mode during standby mode */
-	pmic_reg_read(p, PFUZE3000_LDOGCTL, &reg);
-	reg |= 0x1;
-	ret = pmic_reg_write(p, PFUZE3000_LDOGCTL, reg);
-	if (ret)
-		return ret;
-
-	ret = pmic_reg_write(p, PFUZE3000_SW1AMODE, 0xc);
-	if (ret)
-		return ret;
-
-	ret = pmic_reg_write(p, PFUZE3000_SW1BMODE, 0xc);
-	if (ret)
-		return ret;
-
-	ret = pmic_reg_write(p, PFUZE3000_SW2MODE, 0xc);
-	if (ret)
-		return ret;
-
-	ret = pmic_reg_write(p, PFUZE3000_SW3MODE, 0xc);
-	if (ret)
-		return ret;
-
-	/* set SW1A standby voltage 0.975V */
-	pmic_reg_read(p, PFUZE3000_SW1ASTBY, &reg);
-	reg &= ~0x3f;
-	reg |= PFUZE3000_SW1AB_SETP(9750);
-	ret = pmic_reg_write(p, PFUZE3000_SW1ASTBY, reg);
-	if (ret)
-		return ret;
-
-	/* set SW1B standby voltage 0.975V */
-	pmic_reg_read(p, PFUZE3000_SW1BSTBY, &reg);
-	reg &= ~0x3f;
-	reg |= PFUZE3000_SW1AB_SETP(9750);
-	ret = pmic_reg_write(p, PFUZE3000_SW1BSTBY, reg);
-	if (ret)
-		return ret;
-
-	/* set SW1A/VDD_ARM_IN step ramp up time from 16us to 4us/25mV */
-	pmic_reg_read(p, PFUZE3000_SW1ACONF, &reg);
-	reg &= ~0xc0;
-	reg |= 0x40;
-	ret = pmic_reg_write(p, PFUZE3000_SW1ACONF, reg);
-	if (ret)
-		return ret;
-
-	/* set SW1B/VDD_SOC_IN step ramp up time from 16us to 4us/25mV */
-	pmic_reg_read(p, PFUZE3000_SW1BCONF, &reg);
-	reg &= ~0xc0;
-	reg |= 0x40;
-	ret = pmic_reg_write(p, PFUZE3000_SW1BCONF, reg);
-	if (ret)
-		return ret;
-
-	/* set VDD_ARM_IN to 1.350V */
-	pmic_reg_read(p, PFUZE3000_SW1AVOLT, &reg);
-	reg &= ~0x3f;
-	reg |= PFUZE3000_SW1AB_SETP(13500);
-	ret = pmic_reg_write(p, PFUZE3000_SW1AVOLT, reg);
-	if (ret)
-		return ret;
-
-	/* set VDD_SOC_IN to 1.350V */
-	pmic_reg_read(p, PFUZE3000_SW1BVOLT, &reg);
-	reg &= ~0x3f;
-	reg |= PFUZE3000_SW1AB_SETP(13500);
-	ret = pmic_reg_write(p, PFUZE3000_SW1BVOLT, reg);
-	if (ret)
-		return ret;
-
-	/* set DDR_1_5V to 1.350V */
-	pmic_reg_read(p, PFUZE3000_SW3VOLT, &reg);
-	reg &= ~0x0f;
-	reg |= PFUZE3000_SW3_SETP(13500);
-	ret = pmic_reg_write(p, PFUZE3000_SW3VOLT, reg);
-	if (ret)
-		return ret;
-
-	/* set VGEN2_1V5 to 1.5V */
-	pmic_reg_read(p, PFUZE3000_VLDO2CTL, &reg);
-	reg &= ~0x0f;
-	reg |= PFUZE3000_VLDO_SETP(15000);
-	/*  enable  */
-	reg |= 0x10;
-	ret = pmic_reg_write(p, PFUZE3000_VLDO2CTL, reg);
-	if (ret)
-		return ret;
-
-	return 0;
-}
-#endif
-
-static iomux_v3_cfg_t const uart1_pads[] = {
-	MX6_PAD_GPIO1_IO04__UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-	MX6_PAD_GPIO1_IO05__UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const usdhc2_pads[] = {
-	MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD2_DATA0__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD2_DATA1__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD2_DATA2__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD2_DATA3__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	/* CD pin */
-	MX6_PAD_SD1_DATA0__GPIO6_IO_2 | MUX_PAD_CTRL(NO_PAD_CTRL),
-	/* Power */
-	MX6_PAD_SD1_CMD__GPIO6_IO_1 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const fec1_pads[] = {
-	MX6_PAD_ENET1_MDC__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX6_PAD_ENET1_MDIO__ENET1_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX6_PAD_RGMII1_RX_CTL__ENET1_RX_EN | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
-	MX6_PAD_RGMII1_RD0__ENET1_RX_DATA_0 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
-	MX6_PAD_RGMII1_RD1__ENET1_RX_DATA_1 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
-	MX6_PAD_RGMII1_TX_CTL__ENET1_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX6_PAD_RGMII1_RXC__ENET1_RX_ER | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
-	MX6_PAD_RGMII1_TD0__ENET1_TX_DATA_0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX6_PAD_RGMII1_TD1__ENET1_TX_DATA_1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX6_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
-	MX6_PAD_ENET2_TX_CLK__GPIO2_IO_9 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
-	MX6_PAD_ENET1_CRS__GPIO2_IO_1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const phy_control_pads[] = {
-	/* 25MHz Ethernet PHY Clock */
-	MX6_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M |
-	MUX_PAD_CTRL(ENET_CLK_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const board_recognition_pads[] = {
-	/*Connected to R184*/
-	MX6_PAD_NAND_READY_B__GPIO4_IO_13 | BOARD_DETECT_PAD_CFG,
-	/*Connected to R185*/
-	MX6_PAD_NAND_ALE__GPIO4_IO_0 | BOARD_DETECT_PAD_CFG,
-};
-
-static iomux_v3_cfg_t const wdog_b_pad = {
-	MX6_PAD_GPIO1_IO13__GPIO1_IO_13 | MUX_PAD_CTRL(WDOG_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const peri_3v3_pads[] = {
-	MX6_PAD_QSPI1A_DATA0__GPIO4_IO_16 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-static void setup_iomux_uart(void)
-{
-	imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
-}
-
-static int setup_fec(int fec_id)
-{
-	struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
-	int reg;
-
-	imx_iomux_v3_setup_multiple_pads(phy_control_pads,
-					 ARRAY_SIZE(phy_control_pads));
-
-	/* Reset PHY */
-	gpio_direction_output(IMX_GPIO_NR(2, 1) , 0);
-	udelay(10000);
-	gpio_set_value(IMX_GPIO_NR(2, 1), 1);
-	udelay(100);
-
-	reg = readl(&anatop->pll_enet);
-	reg |= BM_ANADIG_PLL_ENET_REF_25M_ENABLE;
-	writel(reg, &anatop->pll_enet);
-
-	return enable_fec_anatop_clock(fec_id, ENET_25MHZ);
-}
-
-int board_eth_init(struct bd_info *bis)
-{
-	uint32_t base = IMX_FEC_BASE;
-	struct mii_dev *bus = NULL;
-	struct phy_device *phydev = NULL;
-	int ret;
-
-	imx_iomux_v3_setup_multiple_pads(fec1_pads, ARRAY_SIZE(fec1_pads));
-
-	setup_fec(CONFIG_FEC_ENET_DEV);
-
-	bus = fec_get_miibus(base, CONFIG_FEC_ENET_DEV);
-	if (!bus)
-		return -EINVAL;
-
-	phydev = phy_find_by_mask(bus, (0x1 << CONFIG_FEC_MXC_PHYADDR),
-					PHY_INTERFACE_MODE_RMII);
-	if (!phydev) {
-		free(bus);
-		return -EINVAL;
-	}
-
-	ret  = fec_probe(bis, CONFIG_FEC_ENET_DEV, base, bus, phydev);
-	if (ret) {
-		free(bus);
-		free(phydev);
-		return ret;
-	}
-	return 0;
-}
-
-int board_phy_config(struct phy_device *phydev)
-{
-	if (phydev->drv->config)
-		phydev->drv->config(phydev);
-
-	return 0;
-}
-
-int board_init(void)
-{
-	/* Address of boot parameters */
-	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-
-	/*
-	 * Because kernel set WDOG_B mux before pad with the commone pinctrl
-	 * framwork now and wdog reset will be triggered once set WDOG_B mux
-	 * with default pad setting, we set pad setting here to workaround this.
-	 * Since imx_iomux_v3_setup_pad also set mux before pad setting, we set
-	 * as GPIO mux firstly here to workaround it.
-	 */
-	imx_iomux_v3_setup_pad(wdog_b_pad);
-
-	/* Enable PERI_3V3, which is used by SD2, ENET, LVDS, BT */
-	imx_iomux_v3_setup_multiple_pads(peri_3v3_pads,
-					 ARRAY_SIZE(peri_3v3_pads));
-
-	/* Active high for ncp692 */
-	gpio_direction_output(IMX_GPIO_NR(4, 16) , 1);
-
-#ifdef CONFIG_SYS_I2C_MXC
-	setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
-#endif
-
-	return 0;
-}
-
-static int get_board_value(void)
-{
-	int r184, r185;
-
-	imx_iomux_v3_setup_multiple_pads(board_recognition_pads,
-					 ARRAY_SIZE(board_recognition_pads));
-
-	gpio_direction_input(IMX_GPIO_NR(4, 13));
-	gpio_direction_input(IMX_GPIO_NR(4, 0));
-
-	r184 = gpio_get_value(IMX_GPIO_NR(4, 13));
-	r185 = gpio_get_value(IMX_GPIO_NR(4, 0));
-
-	/*
-	 * Machine selection -
-	 * Machine          r184,    r185
-	 * ---------------------------------
-	 * Basic              0        0
-	 * Basic Ks           0        1
-	 * Full               1        0
-	 * Extended           1        1
-	 */
-
-	return (r184 << 1) + r185;
-}
-
-int board_early_init_f(void)
-{
-	setup_iomux_uart();
-
-	return 0;
-}
-
-static struct fsl_esdhc_cfg usdhc_cfg[1] = {
-	{USDHC2_BASE_ADDR, 0, 4},
-};
-
-#define USDHC2_PWR_GPIO IMX_GPIO_NR(6, 1)
-#define USDHC2_CD_GPIO	IMX_GPIO_NR(6, 2)
-
-int board_mmc_getcd(struct mmc *mmc)
-{
-	return !gpio_get_value(USDHC2_CD_GPIO);
-}
-
-int board_mmc_init(struct bd_info *bis)
-{
-	imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
-	usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
-	usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR;
-	gpio_direction_input(USDHC2_CD_GPIO);
-	gpio_direction_output(USDHC2_PWR_GPIO, 1);
-
-	gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;
-	return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
-}
-
-static char *board_string(void)
-{
-	switch (get_board_value()) {
-	case UDOO_NEO_TYPE_BASIC:
-		return "BASIC";
-	case UDOO_NEO_TYPE_BASIC_KS:
-		return "BASICKS";
-	case UDOO_NEO_TYPE_FULL:
-		return "FULL";
-	case UDOO_NEO_TYPE_EXTENDED:
-		return "EXTENDED";
-	}
-	return "UNDEFINED";
-}
-
-int checkboard(void)
-{
-	printf("Board: UDOO Neo %s\n", board_string());
-	return 0;
-}
-
-int board_late_init(void)
-{
-#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
-	env_set("board_name", board_string());
-#endif
-
-	return 0;
-}
-
-#ifdef CONFIG_SPL_BUILD
-
-#include <linux/libfdt.h>
-#include <asm/arch/mx6-ddr.h>
-
-static const struct mx6sx_iomux_ddr_regs mx6_ddr_ioregs = {
-	.dram_dqm0 = 0x00000028,
-	.dram_dqm1 = 0x00000028,
-	.dram_dqm2 = 0x00000028,
-	.dram_dqm3 = 0x00000028,
-	.dram_ras = 0x00000020,
-	.dram_cas = 0x00000020,
-	.dram_odt0 = 0x00000020,
-	.dram_odt1 = 0x00000020,
-	.dram_sdba2 = 0x00000000,
-	.dram_sdcke0 = 0x00003000,
-	.dram_sdcke1 = 0x00003000,
-	.dram_sdclk_0 = 0x00000030,
-	.dram_sdqs0 = 0x00000028,
-	.dram_sdqs1 = 0x00000028,
-	.dram_sdqs2 = 0x00000028,
-	.dram_sdqs3 = 0x00000028,
-	.dram_reset = 0x00000020,
-};
-
-static const struct mx6sx_iomux_grp_regs mx6_grp_ioregs = {
-	.grp_addds = 0x00000020,
-	.grp_ddrmode_ctl = 0x00020000,
-	.grp_ddrpke = 0x00000000,
-	.grp_ddrmode = 0x00020000,
-	.grp_b0ds = 0x00000028,
-	.grp_b1ds = 0x00000028,
-	.grp_ctlds = 0x00000020,
-	.grp_ddr_type = 0x000c0000,
-	.grp_b2ds = 0x00000028,
-	.grp_b3ds = 0x00000028,
-};
-
-static const struct mx6_mmdc_calibration neo_mmcd_calib = {
-	.p0_mpwldectrl0 = 0x000E000B,
-	.p0_mpwldectrl1 = 0x000E0010,
-	.p0_mpdgctrl0 = 0x41600158,
-	.p0_mpdgctrl1 = 0x01500140,
-	.p0_mprddlctl = 0x3A383E3E,
-	.p0_mpwrdlctl = 0x3A383C38,
-};
-
-static const struct mx6_mmdc_calibration neo_basic_mmcd_calib = {
-	.p0_mpwldectrl0 = 0x001E0022,
-	.p0_mpwldectrl1 = 0x001C0019,
-	.p0_mpdgctrl0 = 0x41540150,
-	.p0_mpdgctrl1 = 0x01440138,
-	.p0_mprddlctl = 0x403E4644,
-	.p0_mpwrdlctl = 0x3C3A4038,
-};
-
-/* MT41K256M16 */
-static struct mx6_ddr3_cfg neo_mem_ddr = {
-	.mem_speed = 1600,
-	.density = 4,
-	.width = 16,
-	.banks = 8,
-	.rowaddr = 15,
-	.coladdr = 10,
-	.pagesz = 2,
-	.trcd = 1375,
-	.trcmin = 4875,
-	.trasmin = 3500,
-};
-
-/* MT41K128M16 */
-static struct mx6_ddr3_cfg neo_basic_mem_ddr = {
-	.mem_speed = 1600,
-	.density = 2,
-	.width = 16,
-	.banks = 8,
-	.rowaddr = 14,
-	.coladdr = 10,
-	.pagesz = 2,
-	.trcd = 1375,
-	.trcmin = 4875,
-	.trasmin = 3500,
-};
-
-static void ccgr_init(void)
-{
-	struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
-
-	writel(0xFFFFFFFF, &ccm->CCGR0);
-	writel(0xFFFFFFFF, &ccm->CCGR1);
-	writel(0xFFFFFFFF, &ccm->CCGR2);
-	writel(0xFFFFFFFF, &ccm->CCGR3);
-	writel(0xFFFFFFFF, &ccm->CCGR4);
-	writel(0xFFFFFFFF, &ccm->CCGR5);
-	writel(0xFFFFFFFF, &ccm->CCGR6);
-	writel(0xFFFFFFFF, &ccm->CCGR7);
-}
-
-static void spl_dram_init(void)
-{
-	int board = get_board_value();
-
-	struct mx6_ddr_sysinfo sysinfo = {
-		.dsize = 1, /* width of data bus: 1 = 32 bits */
-		.cs_density = 24,
-		.ncs = 1,
-		.cs1_mirror = 0,
-		.rtt_wr = 2,
-		.rtt_nom = 2,		/* RTT_Nom = RZQ/2 */
-		.walat = 1,		/* Write additional latency */
-		.ralat = 5,		/* Read additional latency */
-		.mif3_mode = 3,		/* Command prediction working mode */
-		.bi_on = 1,		/* Bank interleaving enabled */
-		.sde_to_rst = 0x10,	/* 14 cycles, 200us (JEDEC default) */
-		.rst_to_cke = 0x23,	/* 33 cycles, 500us (JEDEC default) */
-	};
-
-	mx6sx_dram_iocfg(32, &mx6_ddr_ioregs, &mx6_grp_ioregs);
-	if (board == UDOO_NEO_TYPE_BASIC || board == UDOO_NEO_TYPE_BASIC_KS)
-		mx6_dram_cfg(&sysinfo, &neo_basic_mmcd_calib,
-			     &neo_basic_mem_ddr);
-	else
-		mx6_dram_cfg(&sysinfo, &neo_mmcd_calib, &neo_mem_ddr);
-}
-
-void board_init_f(ulong dummy)
-{
-	ccgr_init();
-
-	/* setup AIPS and disable watchdog */
-	arch_cpu_init();
-
-	board_early_init_f();
-
-	/* setup GP timer */
-	timer_init();
-
-	/* UART clocks enabled and gd valid - init serial console */
-	preloader_console_init();
-
-	/* DDR initialization */
-	spl_dram_init();
-
-	/* Clear the BSS. */
-	memset(__bss_start, 0, __bss_end - __bss_start);
-
-	/* load/boot image from boot device */
-	board_init_r(NULL, 0);
-}
-
-#endif
diff --git a/board/udoo/udoo.c b/board/udoo/udoo.c
deleted file mode 100644
index d83f23dd3581..000000000000
--- a/board/udoo/udoo.c
+++ /dev/null
@@ -1,276 +0,0 @@ 
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2013 Freescale Semiconductor, Inc.
- *
- * Author: Fabio Estevam <fabio.estevam@freescale.com>
- */
-
-#include <init.h>
-#include <net.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/iomux.h>
-#include <env.h>
-#include <malloc.h>
-#include <asm/arch/mx6-pins.h>
-#include <asm/global_data.h>
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <asm/gpio.h>
-#include <asm/mach-imx/iomux-v3.h>
-#include <asm/mach-imx/sata.h>
-#include <mmc.h>
-#include <fsl_esdhc_imx.h>
-#include <asm/arch/crm_regs.h>
-#include <asm/io.h>
-#include <asm/arch/sys_proto.h>
-#include <micrel.h>
-#include <miiphy.h>
-#include <netdev.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define UART_PAD_CTRL  (PAD_CTL_PUS_100K_UP |			\
-	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm |			\
-	PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
-
-#define ENET_PAD_CTRL  (PAD_CTL_PUS_100K_UP |                   \
-	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
-
-#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP |			\
-	PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm |			\
-	PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
-
-#define WDT_EN		IMX_GPIO_NR(5, 4)
-#define WDT_TRG		IMX_GPIO_NR(3, 19)
-
-int dram_init(void)
-{
-	gd->ram_size = imx_ddr_size();
-
-	return 0;
-}
-
-static iomux_v3_cfg_t const uart2_pads[] = {
-	IOMUX_PADS(PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
-	IOMUX_PADS(PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
-};
-
-static iomux_v3_cfg_t const usdhc3_pads[] = {
-	IOMUX_PADS(PAD_SD3_CLK__SD3_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-	IOMUX_PADS(PAD_SD3_CMD__SD3_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-	IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-	IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-	IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-	IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-};
-
-static iomux_v3_cfg_t const wdog_pads[] = {
-	IOMUX_PADS(PAD_EIM_A24__GPIO5_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL)),
-	IOMUX_PADS(PAD_EIM_D19__GPIO3_IO19),
-};
-
-int mx6_rgmii_rework(struct phy_device *phydev)
-{
-	/*
-	 * Bug: Apparently uDoo does not works with Gigabit switches...
-	 * Limiting speed to 10/100Mbps, and setting master mode, seems to
-	 * be the only way to have a successfull PHY auto negotiation.
-	 * How to fix: Understand why Linux kernel do not have this issue.
-	 */
-	phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, 0x1c00);
-
-	/* control data pad skew - devaddr = 0x02, register = 0x04 */
-	ksz9031_phy_extended_write(phydev, 0x02,
-				   MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW,
-				   MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000);
-	/* rx data pad skew - devaddr = 0x02, register = 0x05 */
-	ksz9031_phy_extended_write(phydev, 0x02,
-				   MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW,
-				   MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000);
-	/* tx data pad skew - devaddr = 0x02, register = 0x05 */
-	ksz9031_phy_extended_write(phydev, 0x02,
-				   MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW,
-				   MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000);
-	/* gtx and rx clock pad skew - devaddr = 0x02, register = 0x08 */
-	ksz9031_phy_extended_write(phydev, 0x02,
-				   MII_KSZ9031_EXT_RGMII_CLOCK_SKEW,
-				   MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x03FF);
-	return 0;
-}
-
-static iomux_v3_cfg_t const enet_pads1[] = {
-	IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO		| MUX_PAD_CTRL(ENET_PAD_CTRL)),
-	IOMUX_PADS(PAD_ENET_MDC__ENET_MDC		| MUX_PAD_CTRL(ENET_PAD_CTRL)),
-	IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC	| MUX_PAD_CTRL(ENET_PAD_CTRL)),
-	IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0	| MUX_PAD_CTRL(ENET_PAD_CTRL)),
-	IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1	| MUX_PAD_CTRL(ENET_PAD_CTRL)),
-	IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2	| MUX_PAD_CTRL(ENET_PAD_CTRL)),
-	IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3	| MUX_PAD_CTRL(ENET_PAD_CTRL)),
-	IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL	| MUX_PAD_CTRL(ENET_PAD_CTRL)),
-	IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK	| MUX_PAD_CTRL(ENET_PAD_CTRL)),
-	IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC	| MUX_PAD_CTRL(ENET_PAD_CTRL)),
-	/* RGMII reset */
-	IOMUX_PADS(PAD_EIM_D23__GPIO3_IO23		| MUX_PAD_CTRL(NO_PAD_CTRL)),
-	/* Ethernet power supply */
-	IOMUX_PADS(PAD_EIM_EB3__GPIO2_IO31		| MUX_PAD_CTRL(NO_PAD_CTRL)),
-	/* pin 32 - 1 - (MODE0) all */
-	IOMUX_PADS(PAD_RGMII_RD0__GPIO6_IO25		| MUX_PAD_CTRL(NO_PAD_CTRL)),
-	/* pin 31 - 1 - (MODE1) all */
-	IOMUX_PADS(PAD_RGMII_RD1__GPIO6_IO27		| MUX_PAD_CTRL(NO_PAD_CTRL)),
-	/* pin 28 - 1 - (MODE2) all */
-	IOMUX_PADS(PAD_RGMII_RD2__GPIO6_IO28		| MUX_PAD_CTRL(NO_PAD_CTRL)),
-	/* pin 27 - 1 - (MODE3) all */
-	IOMUX_PADS(PAD_RGMII_RD3__GPIO6_IO29		| MUX_PAD_CTRL(NO_PAD_CTRL)),
-	/* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */
-	IOMUX_PADS(PAD_RGMII_RX_CTL__GPIO6_IO24	| MUX_PAD_CTRL(NO_PAD_CTRL)),
-};
-
-static iomux_v3_cfg_t const enet_pads2[] = {
-	IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0	| MUX_PAD_CTRL(ENET_PAD_CTRL)),
-	IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1	| MUX_PAD_CTRL(ENET_PAD_CTRL)),
-	IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2	| MUX_PAD_CTRL(ENET_PAD_CTRL)),
-	IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3	| MUX_PAD_CTRL(ENET_PAD_CTRL)),
-	IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL	| MUX_PAD_CTRL(ENET_PAD_CTRL)),
-};
-
-static void setup_iomux_enet(void)
-{
-	SETUP_IOMUX_PADS(enet_pads1);
-	udelay(20);
-	gpio_direction_output(IMX_GPIO_NR(2, 31), 1); /* Power supply on */
-
-	gpio_direction_output(IMX_GPIO_NR(3, 23), 0); /* assert PHY rst */
-
-	gpio_direction_output(IMX_GPIO_NR(6, 24), 1);
-	gpio_direction_output(IMX_GPIO_NR(6, 25), 1);
-	gpio_direction_output(IMX_GPIO_NR(6, 27), 1);
-	gpio_direction_output(IMX_GPIO_NR(6, 28), 1);
-	gpio_direction_output(IMX_GPIO_NR(6, 29), 1);
-	udelay(1000);
-
-	gpio_set_value(IMX_GPIO_NR(3, 23), 1); /* deassert PHY rst */
-
-	/* Need 100ms delay to exit from reset. */
-	udelay(1000 * 100);
-
-	gpio_free(IMX_GPIO_NR(6, 24));
-	gpio_free(IMX_GPIO_NR(6, 25));
-	gpio_free(IMX_GPIO_NR(6, 27));
-	gpio_free(IMX_GPIO_NR(6, 28));
-	gpio_free(IMX_GPIO_NR(6, 29));
-
-	SETUP_IOMUX_PADS(enet_pads2);
-}
-
-static void setup_iomux_uart(void)
-{
-	SETUP_IOMUX_PADS(uart2_pads);
-}
-
-static void setup_iomux_wdog(void)
-{
-	SETUP_IOMUX_PADS(wdog_pads);
-	gpio_direction_output(WDT_TRG, 0);
-	gpio_direction_output(WDT_EN, 1);
-	gpio_direction_input(WDT_TRG);
-}
-
-static struct fsl_esdhc_cfg usdhc_cfg = { USDHC3_BASE_ADDR };
-
-int board_mmc_getcd(struct mmc *mmc)
-{
-	return 1; /* Always present */
-}
-
-int board_eth_init(struct bd_info *bis)
-{
-	uint32_t base = IMX_FEC_BASE;
-	struct mii_dev *bus = NULL;
-	struct phy_device *phydev = NULL;
-	int ret;
-
-	setup_iomux_enet();
-
-#ifdef CONFIG_FEC_MXC
-	bus = fec_get_miibus(base, -1);
-	if (!bus)
-		return -EINVAL;
-	/* scan phy 4,5,6,7 */
-	phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII);
-
-	if (!phydev) {
-		ret = -EINVAL;
-		goto free_bus;
-	}
-	printf("using phy at %d\n", phydev->addr);
-	ret  = fec_probe(bis, -1, base, bus, phydev);
-	if (ret)
-		goto free_phydev;
-#endif
-	return 0;
-
-free_phydev:
-	free(phydev);
-free_bus:
-	free(bus);
-	return ret;
-}
-
-int board_mmc_init(struct bd_info *bis)
-{
-	SETUP_IOMUX_PADS(usdhc3_pads);
-	usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
-	usdhc_cfg.max_bus_width = 4;
-
-	return fsl_esdhc_initialize(bis, &usdhc_cfg);
-}
-
-int board_early_init_f(void)
-{
-	setup_iomux_wdog();
-	setup_iomux_uart();
-
-	return 0;
-}
-
-int board_phy_config(struct phy_device *phydev)
-{
-	mx6_rgmii_rework(phydev);
-	if (phydev->drv->config)
-		phydev->drv->config(phydev);
-
-	return 0;
-}
-
-int board_init(void)
-{
-	/* address of boot parameters */
-	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-
-#ifdef CONFIG_SATA
-	setup_sata();
-#endif
-	return 0;
-}
-
-int board_late_init(void)
-{
-#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
-	if (is_cpu_type(MXC_CPU_MX6Q))
-		env_set("board_rev", "MX6Q");
-	else
-		env_set("board_rev", "MX6DL");
-#endif
-	return 0;
-}
-
-int checkboard(void)
-{
-	if (is_cpu_type(MXC_CPU_MX6Q))
-		puts("Board: Udoo Quad\n");
-	else
-		puts("Board: Udoo DualLite\n");
-
-	return 0;
-}
diff --git a/board/udoo/udoo_spl.c b/board/udoo/udoo_spl.c
deleted file mode 100644
index d9afbbb74198..000000000000
--- a/board/udoo/udoo_spl.c
+++ /dev/null
@@ -1,257 +0,0 @@ 
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2015 Udoo
- * Author: Tungyi Lin <tungyilin1127@gmail.com>
- *         Richard Hu <hakahu@gmail.com>
- * Based on board/wandboard/spl.c
- */
-
-#include <common.h>
-#include <init.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/iomux.h>
-#include <asm/arch/mx6-pins.h>
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <asm/gpio.h>
-#include <asm/mach-imx/iomux-v3.h>
-#include <asm/mach-imx/video.h>
-#include <mmc.h>
-#include <fsl_esdhc_imx.h>
-#include <asm/arch/crm_regs.h>
-#include <asm/io.h>
-#include <asm/arch/sys_proto.h>
-#include <spl.h>
-
-#if defined(CONFIG_SPL_BUILD)
-#include <asm/arch/mx6-ddr.h>
-
-/*
- * Driving strength:
- *   0x30 == 40 Ohm
- *   0x28 == 48 Ohm
- */
-#define IMX6DQ_DRIVE_STRENGTH		0x30
-#define IMX6SDL_DRIVE_STRENGTH	0x28
-
-/* configure MX6Q/DUAL mmdc DDR io registers */
-static struct mx6dq_iomux_ddr_regs mx6dq_ddr_ioregs = {
-	.dram_sdclk_0 = IMX6DQ_DRIVE_STRENGTH,
-	.dram_sdclk_1 = IMX6DQ_DRIVE_STRENGTH,
-	.dram_cas = IMX6DQ_DRIVE_STRENGTH,
-	.dram_ras = IMX6DQ_DRIVE_STRENGTH,
-	.dram_reset = IMX6DQ_DRIVE_STRENGTH,
-	.dram_sdcke0 = IMX6DQ_DRIVE_STRENGTH,
-	.dram_sdcke1 = IMX6DQ_DRIVE_STRENGTH,
-	.dram_sdba2 = 0x00000000,
-	.dram_sdodt0 = IMX6DQ_DRIVE_STRENGTH,
-	.dram_sdodt1 = IMX6DQ_DRIVE_STRENGTH,
-	.dram_sdqs0 = IMX6DQ_DRIVE_STRENGTH,
-	.dram_sdqs1 = IMX6DQ_DRIVE_STRENGTH,
-	.dram_sdqs2 = IMX6DQ_DRIVE_STRENGTH,
-	.dram_sdqs3 = IMX6DQ_DRIVE_STRENGTH,
-	.dram_sdqs4 = IMX6DQ_DRIVE_STRENGTH,
-	.dram_sdqs5 = IMX6DQ_DRIVE_STRENGTH,
-	.dram_sdqs6 = IMX6DQ_DRIVE_STRENGTH,
-	.dram_sdqs7 = IMX6DQ_DRIVE_STRENGTH,
-	.dram_dqm0 = IMX6DQ_DRIVE_STRENGTH,
-	.dram_dqm1 = IMX6DQ_DRIVE_STRENGTH,
-	.dram_dqm2 = IMX6DQ_DRIVE_STRENGTH,
-	.dram_dqm3 = IMX6DQ_DRIVE_STRENGTH,
-	.dram_dqm4 = IMX6DQ_DRIVE_STRENGTH,
-	.dram_dqm5 = IMX6DQ_DRIVE_STRENGTH,
-	.dram_dqm6 = IMX6DQ_DRIVE_STRENGTH,
-	.dram_dqm7 = IMX6DQ_DRIVE_STRENGTH,
-};
-
-/* configure MX6Q/DUAL mmdc GRP io registers */
-static struct mx6dq_iomux_grp_regs mx6dq_grp_ioregs = {
-	.grp_ddr_type = 0x000c0000,
-	.grp_ddrmode_ctl = 0x00020000,
-	.grp_ddrpke = 0x00000000,
-	.grp_addds = IMX6DQ_DRIVE_STRENGTH,
-	.grp_ctlds = IMX6DQ_DRIVE_STRENGTH,
-	.grp_ddrmode = 0x00020000,
-	.grp_b0ds = IMX6DQ_DRIVE_STRENGTH,
-	.grp_b1ds = IMX6DQ_DRIVE_STRENGTH,
-	.grp_b2ds = IMX6DQ_DRIVE_STRENGTH,
-	.grp_b3ds = IMX6DQ_DRIVE_STRENGTH,
-	.grp_b4ds = IMX6DQ_DRIVE_STRENGTH,
-	.grp_b5ds = IMX6DQ_DRIVE_STRENGTH,
-	.grp_b6ds = IMX6DQ_DRIVE_STRENGTH,
-	.grp_b7ds = IMX6DQ_DRIVE_STRENGTH,
-};
-
-/* configure MX6SOLO/DUALLITE mmdc DDR io registers */
-struct mx6sdl_iomux_ddr_regs mx6sdl_ddr_ioregs = {
-	.dram_sdclk_0 = IMX6SDL_DRIVE_STRENGTH,
-	.dram_sdclk_1 = IMX6SDL_DRIVE_STRENGTH,
-	.dram_cas = IMX6SDL_DRIVE_STRENGTH,
-	.dram_ras = IMX6SDL_DRIVE_STRENGTH,
-	.dram_reset = IMX6SDL_DRIVE_STRENGTH,
-	.dram_sdcke0 = IMX6SDL_DRIVE_STRENGTH,
-	.dram_sdcke1 = IMX6SDL_DRIVE_STRENGTH,
-	.dram_sdba2 = 0x00000000,
-	.dram_sdodt0 = IMX6SDL_DRIVE_STRENGTH,
-	.dram_sdodt1 = IMX6SDL_DRIVE_STRENGTH,
-	.dram_sdqs0 = IMX6SDL_DRIVE_STRENGTH,
-	.dram_sdqs1 = IMX6SDL_DRIVE_STRENGTH,
-	.dram_sdqs2 = IMX6SDL_DRIVE_STRENGTH,
-	.dram_sdqs3 = IMX6SDL_DRIVE_STRENGTH,
-	.dram_sdqs4 = IMX6SDL_DRIVE_STRENGTH,
-	.dram_sdqs5 = IMX6SDL_DRIVE_STRENGTH,
-	.dram_sdqs6 = IMX6SDL_DRIVE_STRENGTH,
-	.dram_sdqs7 = IMX6SDL_DRIVE_STRENGTH,
-	.dram_dqm0 = IMX6SDL_DRIVE_STRENGTH,
-	.dram_dqm1 = IMX6SDL_DRIVE_STRENGTH,
-	.dram_dqm2 = IMX6SDL_DRIVE_STRENGTH,
-	.dram_dqm3 = IMX6SDL_DRIVE_STRENGTH,
-	.dram_dqm4 = IMX6SDL_DRIVE_STRENGTH,
-	.dram_dqm5 = IMX6SDL_DRIVE_STRENGTH,
-	.dram_dqm6 = IMX6SDL_DRIVE_STRENGTH,
-	.dram_dqm7 = IMX6SDL_DRIVE_STRENGTH,
-};
-
-/* configure MX6SOLO/DUALLITE mmdc GRP io registers */
-struct mx6sdl_iomux_grp_regs mx6sdl_grp_ioregs = {
-	.grp_ddr_type = 0x000c0000,
-	.grp_ddrmode_ctl = 0x00020000,
-	.grp_ddrpke = 0x00000000,
-	.grp_addds = IMX6SDL_DRIVE_STRENGTH,
-	.grp_ctlds = IMX6SDL_DRIVE_STRENGTH,
-	.grp_ddrmode = 0x00020000,
-	.grp_b0ds = IMX6SDL_DRIVE_STRENGTH,
-	.grp_b1ds = IMX6SDL_DRIVE_STRENGTH,
-	.grp_b2ds = IMX6SDL_DRIVE_STRENGTH,
-	.grp_b3ds = IMX6SDL_DRIVE_STRENGTH,
-	.grp_b4ds = IMX6SDL_DRIVE_STRENGTH,
-	.grp_b5ds = IMX6SDL_DRIVE_STRENGTH,
-	.grp_b6ds = IMX6SDL_DRIVE_STRENGTH,
-	.grp_b7ds = IMX6SDL_DRIVE_STRENGTH,
-};
-
-/* MT41K128M16JT-125 */
-static struct mx6_ddr3_cfg mt41k128m16jt_125 = {
-	/* quad = 1066, duallite = 800 */
-	.mem_speed = 1066,
-	.density = 2,
-	.width = 16,
-	.banks = 8,
-	.rowaddr = 14,
-	.coladdr = 10,
-	.pagesz = 2,
-	.trcd = 1375,
-	.trcmin = 4875,
-	.trasmin = 3500,
-	.SRT = 0,
-};
-
-static struct mx6_mmdc_calibration mx6q_1g_mmdc_calib = {
-	.p0_mpwldectrl0 = 0x00350035,
-	.p0_mpwldectrl1 = 0x001F001F,
-	.p1_mpwldectrl0 = 0x00010001,
-	.p1_mpwldectrl1 = 0x00010001,
-	.p0_mpdgctrl0 = 0x43510360,
-	.p0_mpdgctrl1 = 0x0342033F,
-	.p1_mpdgctrl0 = 0x033F033F,
-	.p1_mpdgctrl1 = 0x03290266,
-	.p0_mprddlctl = 0x4B3E4141,
-	.p1_mprddlctl = 0x47413B4A,
-	.p0_mpwrdlctl = 0x42404843,
-	.p1_mpwrdlctl = 0x4C3F4C45,
-};
-
-static struct mx6_mmdc_calibration mx6dl_1g_mmdc_calib = {
-	.p0_mpwldectrl0 = 0x002F0038,
-	.p0_mpwldectrl1 = 0x001F001F,
-	.p1_mpwldectrl0 = 0x001F001F,
-	.p1_mpwldectrl1 = 0x001F001F,
-	.p0_mpdgctrl0 = 0x425C0251,
-	.p0_mpdgctrl1 = 0x021B021E,
-	.p1_mpdgctrl0 = 0x021B021E,
-	.p1_mpdgctrl1 = 0x01730200,
-	.p0_mprddlctl = 0x45474C45,
-	.p1_mprddlctl = 0x44464744,
-	.p0_mpwrdlctl = 0x3F3F3336,
-	.p1_mpwrdlctl = 0x32383630,
-};
-
-/* DDR 64bit 1GB */
-static struct mx6_ddr_sysinfo mem_qdl = {
-	.dsize = 2,
-	.cs1_mirror = 0,
-	/* config for full 4GB range so that get_mem_size() works */
-	.cs_density = 32,
-	.ncs = 1,
-	.bi_on = 1,
-	/* quad = 2, duallite = 1 */
-	.rtt_nom = 2,
-	/* quad = 2, duallite = 1 */
-	.rtt_wr = 2,
-	.ralat = 5,
-	.walat = 0,
-	.mif3_mode = 3,
-	.rst_to_cke = 0x23,
-	.sde_to_rst = 0x10,
-	.refsel = 1,	/* Refresh cycles at 32KHz */
-	.refr = 7,	/* 8 refresh commands per refresh cycle */
-};
-
-static void ccgr_init(void)
-{
-	struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
-
-	/* set the default clock gate to save power */
-	writel(0x00C03F3F, &ccm->CCGR0);
-	writel(0x0030FC03, &ccm->CCGR1);
-	writel(0x0FFFC000, &ccm->CCGR2);
-	writel(0x3FF00000, &ccm->CCGR3);
-	writel(0x00FFF300, &ccm->CCGR4);
-	writel(0x0F0000C3, &ccm->CCGR5);
-	writel(0x000003FF, &ccm->CCGR6);
-}
-
-static void spl_dram_init(void)
-{
-	if (is_cpu_type(MXC_CPU_MX6DL)) {
-		mt41k128m16jt_125.mem_speed = 800;
-		mem_qdl.rtt_nom = 1;
-		mem_qdl.rtt_wr = 1;
-
-		mx6sdl_dram_iocfg(64, &mx6sdl_ddr_ioregs, &mx6sdl_grp_ioregs);
-		mx6_dram_cfg(&mem_qdl, &mx6dl_1g_mmdc_calib, &mt41k128m16jt_125);
-	} else if (is_cpu_type(MXC_CPU_MX6Q)) {
-		mt41k128m16jt_125.mem_speed = 1066;
-		mem_qdl.rtt_nom = 2;
-		mem_qdl.rtt_wr = 2;
-
-		mx6dq_dram_iocfg(64, &mx6dq_ddr_ioregs, &mx6dq_grp_ioregs);
-		mx6_dram_cfg(&mem_qdl, &mx6q_1g_mmdc_calib, &mt41k128m16jt_125);
-	}
-
-	udelay(100);
-}
-
-void board_init_f(ulong dummy)
-{
-	ccgr_init();
-
-	/* setup AIPS and disable watchdog */
-	arch_cpu_init();
-
-	gpr_init();
-
-	/* iomux */
-	board_early_init_f();
-
-	/* setup GP timer */
-	timer_init();
-
-	/* UART clocks enabled and gd valid - init serial console */
-	preloader_console_init();
-
-	/* DDR initialization */
-	spl_dram_init();
-}
-#endif
diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig
deleted file mode 100644
index f72b9645dac3..000000000000
--- a/configs/udoo_defconfig
+++ /dev/null
@@ -1,45 +0,0 @@ 
-CONFIG_ARM=y
-CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0x60000
-CONFIG_MX6QDL=y
-CONFIG_TARGET_UDOO=y
-CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL=y
-CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
-CONFIG_BOOTDELAY=3
-CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd"
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SATA=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_MMC=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-CONFIG_DM=y
-CONFIG_BOUNCE_BUFFER=y
-CONFIG_DWC_AHSATA=y
-CONFIG_FSL_USDHC=y
-CONFIG_MTD=y
-CONFIG_PHYLIB=y
-CONFIG_PHY_MICREL=y
-CONFIG_PHY_MICREL_KSZ90X1=y
-CONFIG_MII=y
-CONFIG_MXC_UART=y
-CONFIG_DM_THERMAL=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig
deleted file mode 100644
index ba1e6d31f8d5..000000000000
--- a/configs/udoo_neo_defconfig
+++ /dev/null
@@ -1,42 +0,0 @@ 
-CONFIG_ARM=y
-CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_SPL_GPIO_SUPPORT=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0x80000
-CONFIG_MX6SX=y
-CONFIG_TARGET_UDOO_NEO=y
-CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL=y
-CONFIG_SPL_LIBDISK_SUPPORT=y
-# CONFIG_CMD_BMODE is not set
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
-CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd"
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_MMC=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-CONFIG_BOUNCE_BUFFER=y
-CONFIG_FSL_USDHC=y
-CONFIG_PHYLIB=y
-CONFIG_PHY_MICREL=y
-CONFIG_PHY_MICREL_KSZ8XXX=y
-CONFIG_MII=y
-CONFIG_MXC_UART=y
-CONFIG_IMX_THERMAL=y
-CONFIG_OF_LIBFDT=y
diff --git a/include/configs/udoo.h b/include/configs/udoo.h
deleted file mode 100644
index b4fbf8c6383d..000000000000
--- a/include/configs/udoo.h
+++ /dev/null
@@ -1,88 +0,0 @@ 
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2013 Freescale Semiconductor, Inc.
- *
- * Configuration settings for Udoo board.
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#include "mx6_common.h"
-
-#include "imx6_spl.h"
-
-/* Provide the MACH_TYPE value that the vendor kernel requires. */
-#define CONFIG_MACH_TYPE		4800
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN		(2 * SZ_1M)
-
-#define CONFIG_MXC_UART_BASE		UART2_BASE
-
-/* SATA Configs */
-
-#ifdef CONFIG_CMD_SATA
-#define CONFIG_SYS_SATA_MAX_DEVICE	1
-#define CONFIG_DWC_AHSATA_PORT_ID	0
-#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
-#define CONFIG_LBA48
-#endif
-
-/* Network support */
-
-#define CONFIG_FEC_MXC
-#define IMX_FEC_BASE                    ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE             RGMII
-#define CONFIG_ETHPRIME                 "FEC"
-#define CONFIG_FEC_MXC_PHYADDR          6
-
-/* MMC Configuration */
-#define CONFIG_SYS_FSL_ESDHC_ADDR	0
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
-	"console=ttymxc1,115200\0" \
-	"fdt_high=0xffffffff\0" \
-	"initrd_high=0xffffffff\0" \
-	"fdtfile=undefined\0" \
-	"fdt_addr=0x18000000\0" \
-	"fdt_addr_r=0x18000000\0" \
-	"ip_dyn=yes\0" \
-	"mmcdev=0\0" \
-	"mmcrootfstype=ext4\0" \
-	"findfdt="\
-		"if test ${board_rev} = MX6Q; then " \
-			"setenv fdtfile imx6q-udoo.dtb; fi; " \
-		"if test ${board_rev} = MX6DL; then " \
-			"setenv fdtfile imx6dl-udoo.dtb; fi; " \
-		"if test ${fdtfile} = undefined; then " \
-			"echo WARNING: Could not determine dtb to use; fi\0" \
-	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
-	"pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
-	"ramdisk_addr_r=0x13000000\0" \
-	"scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
-	BOOTENV
-
-#define BOOT_TARGET_DEVICES(func) \
-	func(MMC, mmc, 0) \
-	func(SATA, sata, 0) \
-	func(DHCP, dhcp, na)
-
-#include <config_distro_bootcmd.h>
-#include <linux/stringify.h>
-
-/* Physical Memory Map */
-#define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
-
-#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
-#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
-#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
-	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
-	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
-/* Environment organization */
-
-#endif			       /* __CONFIG_H * */
diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h
deleted file mode 100644
index 4935a2b363e8..000000000000
--- a/include/configs/udoo_neo.h
+++ /dev/null
@@ -1,96 +0,0 @@ 
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright 2014-2015 Freescale Semiconductor, Inc.
- * Copyright Jasbir Matharu
- * Copyright 2015 UDOO Team
- *
- * Configuration settings for the UDOO NEO board.
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#include "mx6_common.h"
-
-#include "imx6_spl.h"
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN		(3 * SZ_1M)
-
-/* MMC Configuration */
-#define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC2_BASE_ADDR
-
-/* Command definition */
-#define CONFIG_MXC_UART_BASE		UART1_BASE
-
-/* Linux only */
-#define CONFIG_EXTRA_ENV_SETTINGS \
-	"console=ttymxc0,115200\0" \
-	"fdt_high=0xffffffff\0" \
-	"initrd_high=0xffffffff\0" \
-	"fdtfile=undefined\0" \
-	"fdt_addr=0x83000000\0" \
-	"fdt_addr_r=0x83000000\0" \
-	"ip_dyn=yes\0" \
-	"mmcdev=0\0" \
-	"mmcrootfstype=ext4\0" \
-	"findfdt="\
-		"if test $board_name = BASIC; then " \
-			"setenv fdtfile imx6sx-udoo-neo-basic.dtb; fi; " \
-		"if test $board_name = BASICKS; then " \
-			"setenv fdtfile imx6sx-udoo-neo-basic.dtb; fi; " \
-		"if test $board_name = FULL; then " \
-			"setenv fdtfile imx6sx-udoo-neo-full.dtb; fi; " \
-		"if test $board_name = EXTENDED; then " \
-			"setenv fdtfile imx6sx-udoo-neo-extended.dtb; fi; " \
-		"if test $fdtfile = UNDEFINED; then " \
-			"echo WARNING: Could not determine dtb to use; fi\0" \
-	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
-	"pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
-	"ramdisk_addr_r=0x84000000\0" \
-	"scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
-	BOOTENV
-
-#define BOOT_TARGET_DEVICES(func) \
-	func(MMC, mmc, 0) \
-	func(DHCP, dhcp, na)
-
-#include <config_distro_bootcmd.h>
-
-/* Miscellaneous configurable options */
-
-/* Physical Memory Map */
-#define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
-#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
-#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
-#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
-	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
-	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
-/* I2C configs */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1
-#define CONFIG_SYS_I2C_SPEED		100000
-
-/* PMIC */
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
-#define CONFIG_POWER_PFUZE3000
-#define CONFIG_POWER_PFUZE3000_I2C_ADDR	0x08
-#define PFUZE3000_I2C_BUS	0
-
-/* Network */
-#define CONFIG_FEC_MXC
-
-#define CONFIG_FEC_ENET_DEV 0
-#define IMX_FEC_BASE			ENET_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR          0x0
-
-#define CONFIG_FEC_XCV_TYPE             RMII
-#define CONFIG_ETHPRIME                 "FEC0"
-
-#endif				/* __CONFIG_H */