From patchwork Sun Feb 21 01:05:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 1442693 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4DjnKg1WXYz9sRf for ; Sun, 21 Feb 2021 12:09:59 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 60F6882786; Sun, 21 Feb 2021 02:07:37 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=konsulko.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id B14E6827D9; Sun, 21 Feb 2021 02:07:16 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H2, SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-qv1-f47.google.com (mail-qv1-f47.google.com [209.85.219.47]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 79CC2827B4 for ; Sun, 21 Feb 2021 02:07:00 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=konsulko.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=tom.rini@gmail.com Received: by mail-qv1-f47.google.com with SMTP id dr7so4526264qvb.1 for ; Sat, 20 Feb 2021 17:07:00 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=rc/TNwTp2PotMEkfaXN6a3LTvUaGbfV9rIdsct94vXQ=; b=pdkEEdd6JLOCdDrfBtb49t9CSoibeBD7MuVwFoSf6ybNp2wNpErYGxxVyj04VJzyxm iTR/bGNfaGYQxnQ+1Cbu7Tun5VxMq4GFJuYybJbv8+vELKhF3WN/vsPVVqePDjDyJByj oewxi10J1YrTC4Eik6Om+F0z3MLXSzVJwGqVm4tcw/VWf1htAnUabPiB1TQz5TuII8U8 Ym5Z0ldYCsDLgkznyO8wnlac8thccgOSmYBv48yWelquRMsg0fJIrJoQ4u88JyFkoI4b 0gIRHjxUNzK7ISV/lkuA1xshycl0698rc+aFiSCgmafNMjM0NwbX/Fd6IoFqXlQwJ1Ev bGqA== X-Gm-Message-State: AOAM532F4MMzMyis2/PvqIfjrDtqtQY2gFZYJBgFz2qlfiIA5AVEwtms XG8mNmW9JXBjmPg8ZrmSVzx7Nssnxg== X-Google-Smtp-Source: ABdhPJwLPcmOMBFDpRugCpb+evVHPfPFUSGwE7lRkIgGYjaLwjQvjUdbGooohTFiPb353mOIAOUiEg== X-Received: by 2002:a05:6214:724:: with SMTP id c4mr2096654qvz.60.1613869618804; Sat, 20 Feb 2021 17:06:58 -0800 (PST) Received: from bill-the-cat.lan (2603-6081-7b07-927a-9c68-72b3-3fc3-46af.res6.spectrum.com. [2603:6081:7b07:927a:9c68:72b3:3fc3:46af]) by smtp.gmail.com with ESMTPSA id p12sm8233241qtw.27.2021.02.20.17.06.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Feb 2021 17:06:58 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Cc: Ben Whitten Subject: [PATCH 14/57] arm: Remove wb45n board Date: Sat, 20 Feb 2021 20:05:51 -0500 Message-Id: <20210221010634.21310-15-trini@konsulko.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210221010634.21310-1-trini@konsulko.com> References: <20210221010634.21310-1-trini@konsulko.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Ben Whitten Signed-off-by: Tom Rini --- arch/arm/mach-at91/Kconfig | 6 - board/laird/wb45n/Kconfig | 12 -- board/laird/wb45n/MAINTAINERS | 6 - board/laird/wb45n/Makefile | 4 - board/laird/wb45n/wb45n.c | 200 ---------------------------------- configs/wb45n_defconfig | 51 --------- include/configs/wb45n.h | 124 --------------------- 7 files changed, 403 deletions(-) delete mode 100644 board/laird/wb45n/Kconfig delete mode 100644 board/laird/wb45n/MAINTAINERS delete mode 100644 board/laird/wb45n/Makefile delete mode 100644 board/laird/wb45n/wb45n.c delete mode 100644 configs/wb45n_defconfig delete mode 100644 include/configs/wb45n.h diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index c78a308f4884..5880e651bafd 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -303,11 +303,6 @@ config TARGET_VINCO select SUPPORT_SPL imply CMD_DM -config TARGET_WB45N - bool "Support Laird WB45N" - select CPU_ARM926EJS - select SUPPORT_SPL - config TARGET_WB50N bool "Support Laird WB50N" select BOARD_EARLY_INIT_F @@ -358,7 +353,6 @@ source "board/ronetix/pm9g45/Kconfig" source "board/siemens/corvus/Kconfig" source "board/siemens/taurus/Kconfig" source "board/siemens/smartweb/Kconfig" -source "board/laird/wb45n/Kconfig" source "board/laird/wb50n/Kconfig" config SPL_LDSCRIPT diff --git a/board/laird/wb45n/Kconfig b/board/laird/wb45n/Kconfig deleted file mode 100644 index 2a67337293ef..000000000000 --- a/board/laird/wb45n/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_WB45N - -config SYS_BOARD - default "wb45n" - -config SYS_VENDOR - default "laird" - -config SYS_CONFIG_NAME - default "wb45n" - -endif diff --git a/board/laird/wb45n/MAINTAINERS b/board/laird/wb45n/MAINTAINERS deleted file mode 100644 index 60bb56320103..000000000000 --- a/board/laird/wb45n/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -WB45N CPU MODULE -M: Ben Whitten -S: Maintained -F: board/laird/wb45n/ -F: include/configs/wb45n.h -F: configs/wb45n_defconfig diff --git a/board/laird/wb45n/Makefile b/board/laird/wb45n/Makefile deleted file mode 100644 index 2971c6c95286..000000000000 --- a/board/laird/wb45n/Makefile +++ /dev/null @@ -1,4 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y += wb45n.o diff --git a/board/laird/wb45n/wb45n.c b/board/laird/wb45n/wb45n.c deleted file mode 100644 index 5e1ef8a49ac4..000000000000 --- a/board/laird/wb45n/wb45n.c +++ /dev/null @@ -1,200 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -/* ------------------------------------------------------------------------- */ -/* - * Miscelaneous platform dependent initialisations - */ -static void wb45n_nand_hw_init(void) -{ - struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; - struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; - unsigned long csa; - - csa = readl(&matrix->ebicsa); - /* Enable CS3 */ - csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA; - /* NAND flash on D0 */ - csa &= ~AT91_MATRIX_NFD0_ON_D16; - writel(csa, &matrix->ebicsa); - - /* Configure SMC CS3 for NAND/SmartMedia */ - writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | - AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), - &smc->cs[3].setup); - writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(5) | - AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(6), - &smc->cs[3].pulse); - writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(6), - &smc->cs[3].cycle); - writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | - AT91_SMC_MODE_EXNW_DISABLE | - AT91_SMC_MODE_DBW_8 | - AT91_SMC_MODE_TDF_CYCLE(1), &smc->cs[3].mode); - - at91_periph_clk_enable(ATMEL_ID_PIOCD); - - /* Configure RDY/BSY */ - at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); - /* Enable NandFlash */ - at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); - /* Disable Flash Write Protect Line */ - at91_set_gpio_output(AT91_PIN_PD10, 1); - - at91_set_a_periph(AT91_PIO_PORTD, 0, 1); /* NAND OE */ - at91_set_a_periph(AT91_PIO_PORTD, 1, 1); /* NAND WE */ - at91_set_a_periph(AT91_PIO_PORTD, 2, 1); /* NAND ALE */ - at91_set_a_periph(AT91_PIO_PORTD, 3, 1); /* NAND CLE */ -} - -static void wb45n_gpio_hw_init(void) -{ - - /* Configure wifi gpio CHIP_PWD_L */ - at91_set_gpio_output(AT91_PIN_PA28, 0); - - /* Setup USB pins */ - at91_set_gpio_input(AT91_PIN_PB11, 0); - at91_set_gpio_output(AT91_PIN_PB12, 0); - - /* IRQ pin, pullup, deglitch */ - at91_set_gpio_input(AT91_PIN_PB18, 1); - at91_set_gpio_deglitch(AT91_PIN_PB18, 1); -} - -int board_eth_init(struct bd_info *bis) -{ - int rc = 0; - - if (has_emac0()) - rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00); - - return rc; -} - -int board_early_init_f(void) -{ - at91_seriald_hw_init(); - return 0; -} - -int board_init(void) -{ - /* address of boot parameters */ - gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; - - wb45n_gpio_hw_init(); - - wb45n_nand_hw_init(); - - at91_macb_hw_init(); - - return 0; -} - -int dram_init(void) -{ - gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, - CONFIG_SYS_SDRAM_SIZE); - return 0; -} - -#if defined(CONFIG_SPL_BUILD) -#include -#include - -void at91_spl_board_init(void) -{ - /* Setup GPIO first */ - wb45n_gpio_hw_init(); - - /* Bring up NAND */ - wb45n_nand_hw_init(); -} - -void matrix_init(void) -{ - struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; - unsigned long csa; - - csa = readl(&matrix->ebicsa); - /* Pull ups on D0 - D16 */ - csa &= ~AT91_MATRIX_EBI_DBPU_OFF; - csa |= AT91_MATRIX_EBI_DBPD_OFF; - /* Normal drive strength */ - csa |= AT91_MATRIX_EBI_EBI_IOSR_NORMAL; - /* Multi-port off */ - csa &= ~AT91_MATRIX_MP_ON; - writel(csa, &matrix->ebicsa); -} - -#include -static void ddr2_conf(struct atmel_mpddrc_config *ddr2) -{ - ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_LPDDR_SDRAM); - - ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | - ATMEL_MPDDRC_CR_NR_ROW_13 | - ATMEL_MPDDRC_CR_CAS_DDR_CAS3 | - ATMEL_MPDDRC_CR_DECOD_INTERLEAVED | - ATMEL_MPDDRC_CR_DQMS_SHARED); - - ddr2->rtr = 0x411; - - ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET | - 2 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET | - 2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET | - 8 << ATMEL_MPDDRC_TPR0_TRC_OFFSET | - 2 << ATMEL_MPDDRC_TPR0_TRP_OFFSET | - 2 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET | - 2 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET | - 2 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET); - - ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | - 200 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET | - 19 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET | - 18 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET); - - ddr2->tpr2 = (7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET | - 2 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET | - 3 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET | - 7 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET | - 2 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET); -} - -void mem_init(void) -{ - struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; - struct atmel_mpddrc_config ddr2; - unsigned long csa; - - ddr2_conf(&ddr2); - - /* enable DDR2 clock */ - at91_system_clk_enable(AT91_PMC_DDR); - - /* Chip select 1 is for DDR2/SDRAM */ - csa = readl(&matrix->ebicsa); - csa |= AT91_MATRIX_EBI_CS1A_SDRAMC; - writel(csa, &matrix->ebicsa); - - /* DDRAM2 Controller initialize */ - ddr2_init(ATMEL_BASE_DDRSDRC, ATMEL_BASE_CS1, &ddr2); -} -#endif diff --git a/configs/wb45n_defconfig b/configs/wb45n_defconfig deleted file mode 100644 index ca47edf32113..000000000000 --- a/configs/wb45n_defconfig +++ /dev/null @@ -1,51 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_THUMB_BUILD=y -CONFIG_ARCH_AT91=y -CONFIG_SYS_TEXT_BASE=0x23f00000 -CONFIG_TARGET_WB45N=y -CONFIG_SPL_GPIO_SUPPORT=y -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x20000000 -CONFIG_SYS_MEMTEST_END=0x23e00000 -CONFIG_ENV_OFFSET=0xA0000 -CONFIG_SPL_TEXT_BASE=0x300000 -CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL=y -CONFIG_ENV_OFFSET_REDUND=0xC0000 -CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_NANDFLASH" -CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk rw noinitrd mem=64M rootfstype=ubifs root=ubi0:rootfs ubi.mtd=6" -CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_SPL_NAND_SUPPORT=y -CONFIG_SPL_NAND_DRIVERS=y -CONFIG_SPL_NAND_BASE=y -CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTZ=y -CONFIG_CMD_MEMTEST=y -# CONFIG_CMD_FLASH is not set -# CONFIG_CMD_LOADS is not set -CONFIG_CMD_NAND=y -CONFIG_CMD_NAND_TRIMFFS=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_MTDPARTS=y -CONFIG_ENV_OVERWRITE=y -CONFIG_ENV_IS_IN_NAND=y -CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_AT91_GPIO=y -CONFIG_MTD=y -CONFIG_MTD_RAW_NAND=y -# CONFIG_SYS_NAND_USE_FLASH_BBT is not set -CONFIG_NAND_ATMEL=y -CONFIG_PMECC_CAP=4 -CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y -CONFIG_ATMEL_USART=y -CONFIG_LZMA=y -CONFIG_LZO=y -CONFIG_OF_LIBFDT=y diff --git a/include/configs/wb45n.h b/include/configs/wb45n.h deleted file mode 100644 index cc7a688580ea..000000000000 --- a/include/configs/wb45n.h +++ /dev/null @@ -1,124 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuation settings for the WB45N CPU Module. - */ - -#ifndef __CONFIG_H__ -#define __CONFIG_H__ - -#include -#include - -/* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 -#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ - -#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG -#define CONFIG_SKIP_LOWLEVEL_INIT - -/* general purpose I/O */ -#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ - -/* serial console */ -#define CONFIG_USART_BASE ATMEL_BASE_DBGU -#define CONFIG_USART_ID ATMEL_ID_SYS - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 MB */ - -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) - -/* NAND flash */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE 0x40000000 -/* our ALE is AD21 */ -#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) -/* our CLE is AD22 */ -#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 - -#define CONFIG_RBTREE - -/* Ethernet */ -#define CONFIG_MACB -#define CONFIG_RMII -#define CONFIG_NET_RETRY_COUNT 20 -#define CONFIG_MACB_SEARCH_PHY -#define CONFIG_ETHADDR C0:EE:40:00:00:00 - -/* System */ -#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ - -#ifdef CONFIG_SYS_USE_NANDFLASH -/* bootstrap + u-boot + env + linux in nandflash */ - -#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xe0000 0x280000; " \ - "run _mtd; bootm" - -#define MTDIDS_DEFAULT "nand0=atmel_nand" -#define MTDPARTS_DEFAULT "mtdparts=atmel_nand:" \ - "128K(at91bs)," \ - "512K(u-boot)," \ - "128K(u-boot-env)," \ - "128K(redund-env)," \ - "2560K(kernel-a)," \ - "2560K(kernel-b)," \ - "38912K(rootfs-a)," \ - "38912K(rootfs-b)," \ - "46208K(user)," \ - "512K(logs)" - -#else -#error No boot method selected, please select 'CONFIG_SYS_USE_NANDFLASH' -#endif - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "_mtd=mtdparts default; setenv bootargs ${bootargs} ${mtdparts}\0" \ - "autoload=no\0" \ - "autostart=no\0" \ - "ethaddr=" __stringify(CONFIG_ETHADDR) "\0" \ - "\0" - -#define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_MAXARGS 16 - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000) - -/* SPL */ -#define CONFIG_SPL_MAX_SIZE 0x6000 -#define CONFIG_SPL_STACK 0x308000 - -#define CONFIG_SPL_BSS_START_ADDR 0x20000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 -#define CONFIG_SYS_SPL_MALLOC_START 0x20080000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 - -#define CONFIG_SYS_MONITOR_LEN (512 << 10) - -#define CONFIG_SYS_MASTER_CLOCK 132096000 -#define CONFIG_SYS_AT91_PLLA 0x20c73f03 -#define CONFIG_SYS_MCKR 0x1301 -#define CONFIG_SYS_MCKR_CSS 0x1302 - -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_SIZE 0x800 -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 - -#endif /* __CONFIG_H__ */