diff mbox series

[03/13] imx: ddr: imx8m: add print for DRAM rate

Message ID 20201228121710.17235-3-peng.fan@oss.nxp.com
State Superseded
Delegated to: Stefano Babic
Headers show
Series [01/13] imx: imx8mp_evk: enable eth support | expand

Commit Message

Peng Fan (OSS) Dec. 28, 2020, 12:17 p.m. UTC 
From: Ye Li <ye.li@nxp.com>

Enable print to show the DRAM rate of current setting and training
result.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/ddr/imx/imx8m/ddr_init.c     | 7 ++++---
 drivers/ddr/imx/imx8m/ddrphy_utils.c | 2 +-
 2 files changed, 5 insertions(+), 4 deletions(-)

Comments

Adam Ford Dec. 28, 2020, 1:53 p.m. UTC | #1 
On Mon, Dec 28, 2020 at 7:27 AM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
>
> From: Ye Li <ye.li@nxp.com>
>
> Enable print to show the DRAM rate of current setting and training
> result.
>
> Signed-off-by: Ye Li <ye.li@nxp.com>
> Reviewed-by: Peng Fan <peng.fan@nxp.com>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  drivers/ddr/imx/imx8m/ddr_init.c     | 7 ++++---
>  drivers/ddr/imx/imx8m/ddrphy_utils.c | 2 +-
>  2 files changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/ddr/imx/imx8m/ddr_init.c b/drivers/ddr/imx/imx8m/ddr_init.c
> index 99a67edfb0..65739dbaa7 100644
> --- a/drivers/ddr/imx/imx8m/ddr_init.c
> +++ b/drivers/ddr/imx/imx8m/ddr_init.c
> @@ -96,7 +96,7 @@ int ddr_init(struct dram_timing_info *dram_timing)
>         unsigned int tmp, initial_drate, target_freq;
>         int ret;
>
> -       debug("DDRINFO: start DRAM init\n");
> +       printf("DDRINFO: start DRAM init\n");

Why not make this optional?  With debug enabled, it will print.  This
makes extra chatter for everyone.
It also undoes: 0d3bc813  ("imx8m: ddr_init: Move ddr_init() messages
to debug level")

>
>         /* Step1: Follow the power up procedure */
>         if (is_imx8mq()) {
> @@ -119,6 +119,7 @@ int ddr_init(struct dram_timing_info *dram_timing)
>
>         initial_drate = dram_timing->fsp_msg[0].drate;
>         /* default to the frequency point 0 clock */
> +       printf("DDRINFO: DRAM rate %dMTS\n", initial_drate);
>         ddrphy_init_set_dfi_clk(initial_drate);
>
>         /* D-aasert the presetn */
> @@ -185,7 +186,7 @@ int ddr_init(struct dram_timing_info *dram_timing)
>                 tmp = reg32_read(DDRPHY_CalBusy(0));
>         } while ((tmp & 0x1));
>
> -       debug("DDRINFO:ddrphy calibration done\n");
> +       printf("DDRINFO:ddrphy calibration done\n");
>
>         /* Step15: Set SWCTL.sw_done to 0 */
>         reg32_write(DDRC_SWCTL(0), 0x00000000);
> @@ -240,7 +241,7 @@ int ddr_init(struct dram_timing_info *dram_timing)
>
>         /* enable port 0 */
>         reg32_write(DDRC_PCTRL_0(0), 0x00000001);
> -       debug("DDRINFO: ddrmix config done\n");
> +       printf("DDRINFO: ddrmix config done\n");
>
>         board_dram_ecc_scrub();
>
> diff --git a/drivers/ddr/imx/imx8m/ddrphy_utils.c b/drivers/ddr/imx/imx8m/ddrphy_utils.c
> index 0f8baefb1f..326b92d784 100644
> --- a/drivers/ddr/imx/imx8m/ddrphy_utils.c
> +++ b/drivers/ddr/imx/imx8m/ddrphy_utils.c
> @@ -104,7 +104,7 @@ int wait_ddrphy_training_complete(void)
>                         debug("Training PASS\n");
>                         return 0;
>                 } else if (mail == 0xff) {
> -                       debug("Training FAILED\n");
> +                       printf("Training FAILED\n");
>                         return -1;
>                 }
>         }
> --
> 2.28.0
>
Fabio Estevam Dec. 28, 2020, 2:01 p.m. UTC | #2 
On Mon, Dec 28, 2020 at 10:53 AM Adam Ford <aford173@gmail.com> wrote:

> Why not make this optional?  With debug enabled, it will print.  This
> makes extra chatter for everyone.
> It also undoes: 0d3bc813  ("imx8m: ddr_init: Move ddr_init() messages
> to debug level")

Exactly. This type of information could be of interest during
development, but for the final version, it is noise.
diff mbox series

Patch

diff --git a/drivers/ddr/imx/imx8m/ddr_init.c b/drivers/ddr/imx/imx8m/ddr_init.c
index 99a67edfb0..65739dbaa7 100644
--- a/drivers/ddr/imx/imx8m/ddr_init.c
+++ b/drivers/ddr/imx/imx8m/ddr_init.c
@@ -96,7 +96,7 @@  int ddr_init(struct dram_timing_info *dram_timing)
 	unsigned int tmp, initial_drate, target_freq;
 	int ret;
 
-	debug("DDRINFO: start DRAM init\n");
+	printf("DDRINFO: start DRAM init\n");
 
 	/* Step1: Follow the power up procedure */
 	if (is_imx8mq()) {
@@ -119,6 +119,7 @@  int ddr_init(struct dram_timing_info *dram_timing)
 
 	initial_drate = dram_timing->fsp_msg[0].drate;
 	/* default to the frequency point 0 clock */
+	printf("DDRINFO: DRAM rate %dMTS\n", initial_drate);
 	ddrphy_init_set_dfi_clk(initial_drate);
 
 	/* D-aasert the presetn */
@@ -185,7 +186,7 @@  int ddr_init(struct dram_timing_info *dram_timing)
 		tmp = reg32_read(DDRPHY_CalBusy(0));
 	} while ((tmp & 0x1));
 
-	debug("DDRINFO:ddrphy calibration done\n");
+	printf("DDRINFO:ddrphy calibration done\n");
 
 	/* Step15: Set SWCTL.sw_done to 0 */
 	reg32_write(DDRC_SWCTL(0), 0x00000000);
@@ -240,7 +241,7 @@  int ddr_init(struct dram_timing_info *dram_timing)
 
 	/* enable port 0 */
 	reg32_write(DDRC_PCTRL_0(0), 0x00000001);
-	debug("DDRINFO: ddrmix config done\n");
+	printf("DDRINFO: ddrmix config done\n");
 
 	board_dram_ecc_scrub();
 
diff --git a/drivers/ddr/imx/imx8m/ddrphy_utils.c b/drivers/ddr/imx/imx8m/ddrphy_utils.c
index 0f8baefb1f..326b92d784 100644
--- a/drivers/ddr/imx/imx8m/ddrphy_utils.c
+++ b/drivers/ddr/imx/imx8m/ddrphy_utils.c
@@ -104,7 +104,7 @@  int wait_ddrphy_training_complete(void)
 			debug("Training PASS\n");
 			return 0;
 		} else if (mail == 0xff) {
-			debug("Training FAILED\n");
+			printf("Training FAILED\n");
 			return -1;
 		}
 	}