@@ -50,7 +50,7 @@ void musb_start(void)
# define config_fifo(dir, idx, addr) \
do { \
writeb(idx, &musbr->dir##fifosz); \
- writew(fifoaddr >> 3, &musbr->dir##fifoadd); \
+ writew(addr, &musbr->dir##fifoadd); \
} while (0)
#endif
@@ -66,14 +66,14 @@ void musb_start(void)
void musb_configure_ep(const struct musb_epinfo *epinfo, u8 cnt)
{
u16 csr;
- u16 fifoaddr = 64; /* First 64 bytes of FIFO reserved for EP0 */
+ u16 fifoaddr = 64 >> 3; /* First 64 bytes of FIFO reserved for EP0 */
u32 fifosize;
u8 idx;
while (cnt--) {
/* prepare fifosize to write to register */
fifosize = epinfo->epsize >> 3;
- idx = ffs(fifosize) - 1;
+ idx = fifosize ? ((ffs(fifosize) - 1) & 0xF) : 0;
writeb(epinfo->epnum, &musbr->index);
if (epinfo->epdir) {
@@ -99,7 +99,7 @@ void musb_configure_ep(const struct musb_epinfo *epinfo, u8 cnt)
writew(csr | MUSB_RXCSR_FLUSHFIFO,
&musbr->rxcsr);
}
- fifoaddr += epinfo->epsize;
+ fifoaddr += 1 << idx;
epinfo++;
}
}
This patch fixes configuring FIFO for one-directional endpoints which have either RX or TX queue and therefore only one FIFO. Size of FIFO buffer is 2^(idx+3) bytes and starting address is 2^(addr+3). Moreover first 64 bytes are reserved for EP0. Without this patch if FIFO size specified by caller was zero then idx was incorrectly calculated (expr. ffs(0)-1) and size overflowed in fifosz register. This register uses has only 4 bits for FIFO size. Moreover specifying zero size is not possible. This patch is fixing calculation of start address and buffer size to minimal value and ensure that it would not overlap with reserved EP0 buffer. This issue caused loose of packets on USB bus in both directions and basically usbtty was unusable. Signed-off-by: Pali Rohár <pali@kernel.org> --- Changes in v2: * Correctly calculate minimal buffer size * Store into fifoaddr address in musb units (8 bytes) --- drivers/usb/musb/musb_core.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)