| Message ID | 20201120132823.748319735@rtp-net.org |
|---|---|
| State | Changes Requested |
| Delegated to: | Kever Yang |
| Headers | show |
| Series | rk3399 (Pinebook pro) EDP support | expand |
Hi Arnaud,
Please correct the typo in subject line.
Thanks,
- Kever
Arnaud Patard <arnaud.patard@rtp-net.org> 于2020年11月20日周五 下午9:30写道：
> The linux code is setting polarity configuration to 3 but
> uboot code is setting it to 1. Change the configuration to match the
> linux configuration
>
> Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
> Index: u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h
> ===================================================================
> --- u-boot.orig/arch/arm/include/asm/arch-rockchip/edp_rk3288.h
> +++ u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h
> @@ -297,7 +297,9 @@ check_member(rk3288_edp, pll_reg_5, 0xa0
>
> /* int_ctl */
> #define SOFT_INT_CTRL (0x1 << 2)
> -#define INT_POL (0x1 << 0)
> +#define INT_POL1 (0x1 << 1)
> +#define INT_POL0 (0x1 << 0)
> +#define INT_POL (INT_POL0 |
> INT_POL1)
>
> /* sys_ctl_1 */
> #define DET_STA (0x1 << 2)
>
>
>
Index: u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h =================================================================== --- u-boot.orig/arch/arm/include/asm/arch-rockchip/edp_rk3288.h +++ u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h @@ -297,7 +297,9 @@ check_member(rk3288_edp, pll_reg_5, 0xa0 /* int_ctl */ #define SOFT_INT_CTRL (0x1 << 2) -#define INT_POL (0x1 << 0) +#define INT_POL1 (0x1 << 1) +#define INT_POL0 (0x1 << 0) +#define INT_POL (INT_POL0 | INT_POL1) /* sys_ctl_1 */ #define DET_STA (0x1 << 2)
The linux code is setting polarity configuration to 3 but uboot code is setting it to 1. Change the configuration to match the linux configuration Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>