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bh=FvjWm+oKT9R/vJYeVLtl7jeeGuGmytNSl3U68Edw8xI=; b=f8f8lTkO9jlpXBOyma1nk2Bijgw7MYu+zrqURzDHU9KyPrlfoSDtiES9igt72DfpWl a+WbcGc+56SEc8Hseo3arQKG8Zyh7AjkzzTXmVqIEqWQo7iSTjWa/v13Xlz3oq5SAmYe PRAFyu8TNPZsdVBsiu34BwtW4tUGWlSSmomqP+jK7qyu8iwvcnu1VxnPoWL9sLsj6wTw qy642L6V11DukyIeWq9YRTIM8Fsf4a+a3LIsTXM83QoMs4FqfRRIBs/pLdGOJG16MnWZ ilttgPYEhsqf4rHhx9Xh2tMB8hhToOj9662vpgGkKnHO6jR7E7dxs1Jcex+xRGP7tvvs 7H9A== X-Gm-Message-State: AOAM530JohahVDvLD0ZBMk07ZxymbUo4pUdq++wNjy/9YFeND8bojDKh J2UtJjj19JJsojIhIxaXckYER3pxjKg= X-Google-Smtp-Source: ABdhPJwoCtiiOOL9wuBQGjj+2moCPc+piEOnjUkLX7oc5GvfCq0pBv6IX9MZzDpM31vZ74L5Wp5AyQ== X-Received: by 2002:a5d:63c3:: with SMTP id c3mr4874116wrw.315.1603833328586; Tue, 27 Oct 2020 14:15:28 -0700 (PDT) Received: from localhost.localdomain ([178.233.176.159]) by smtp.gmail.com with ESMTPSA id t23sm3310914wmn.13.2020.10.27.14.15.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Oct 2020 14:15:28 -0700 (PDT) From: Alper Nebi Yasak To: u-boot@lists.denx.de Cc: Philipp Tomsich , Simon Glass , Lukasz Majewski , Kever Yang , Alper Nebi Yasak Subject: [PATCH v2 2/2] rockchip: gru: Allow setting up clocks in U-Boot proper Date: Wed, 28 Oct 2020 00:15:11 +0300 Message-Id: <20201027211511.14544-2-alpernebiyasak@gmail.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201027211511.14544-1-alpernebiyasak@gmail.com> References: <20201027211511.14544-1-alpernebiyasak@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Commit fe974716326c ("rockchip: rk3288: Allow setting up clocks in U-Boot proper") fixes some clock issues when chainloading U-Boot on rk3288 chromebooks. Part of that change is still available in veyron's board_early_init_r() function. Since chain-loading U-Boot proper from vendor firmware is possible on gru boards as well, do the same thing for them too. On rk3399, this needs to detect whether SPL was run via handoff, so enable that and bloblist kconfigs it needs for chromebook_bob. Signed-off-by: Alper Nebi Yasak Reviewed-by: Simon Glass Reviewed-by: Kever Yang --- Changes in v2: - Enable kconfigs needed for using SPL handoff v1: https://patchwork.ozlabs.org/project/uboot/patch/20201022203740.24528-2-alpernebiyasak@gmail.com/ board/google/gru/gru.c | 23 +++++++++++++++++++++++ configs/chromebook_bob_defconfig | 5 +++++ 2 files changed, 28 insertions(+) diff --git a/board/google/gru/gru.c b/board/google/gru/gru.c index 7dfbc3ac8676..441a1a376a9a 100644 --- a/board/google/gru/gru.c +++ b/board/google/gru/gru.c @@ -4,6 +4,7 @@ */ #include +#include #include #ifdef CONFIG_SPL_BUILD @@ -31,3 +32,25 @@ int board_early_init_f(void) return 0; } #endif + +#ifndef CONFIG_SPL_BUILD +int board_early_init_r(void) +{ + struct udevice *clk; + int ret; + + /* + * This init is done in SPL, but when chain-loading U-Boot SPL will + * have been skipped. Allow the clock driver to check if it needs + * setting up. + */ + ret = uclass_get_device_by_driver(UCLASS_CLK, + DM_GET_DRIVER(clk_rk3399), &clk); + if (ret) { + debug("%s: CLK init failed: %d\n", __func__, ret); + return ret; + } + + return 0; +} +#endif diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig index 4608892fb567..73635f0d13f1 100644 --- a/configs/chromebook_bob_defconfig +++ b/configs/chromebook_bob_defconfig @@ -19,6 +19,11 @@ CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_BLOBLIST=y +CONFIG_BLOBLIST_SIZE=0x1000 +CONFIG_BLOBLIST_ADDR=0x100000 +CONFIG_HANDOFF=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000