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[v4,12/13] riscv: Add device tree bindings for SPI

Message ID 20201016225755.302659-13-seanga2@gmail.com
State Accepted
Commit b55af5a2252be84a48c94a2d392c1da71c89be78
Delegated to: Jagannadha Sutradharudu Teki
Headers show
Series riscv: Add SPI support for Kendryte K210 | expand

Commit Message

Sean Anderson Oct. 16, 2020, 10:57 p.m. UTC 
This patch adds bindings for the MMC slot and SPI flash on the Sipeed Maix
Bit.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Acked-by: Rick Chen <rick@andestech.com>
---
This patch was previously part of
https://patchwork.ozlabs.org/project/uboot/list/?series=161576

(no changes since v2)

Changes in v2:
- Remove broken-wp property (implicit due to no wp gpio)
- Remove ctrl0 field offsets from device tree
- Switch to new compatible strings
- Switch to new pinmux binding style

 arch/riscv/dts/k210-maix-bit.dts | 46 +++++++++++++++++++++++++++++++-
 arch/riscv/dts/k210.dtsi         |  2 ++
 2 files changed, 47 insertions(+), 1 deletion(-)
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Patch

diff --git a/arch/riscv/dts/k210-maix-bit.dts b/arch/riscv/dts/k210-maix-bit.dts
index c2beec602c..e4dea205b2 100644
--- a/arch/riscv/dts/k210-maix-bit.dts
+++ b/arch/riscv/dts/k210-maix-bit.dts
@@ -152,7 +152,7 @@ 
 		pinmux = <K210_FPIOA(26, K210_PCF_SPI1_D1)>,
 			 <K210_FPIOA(27, K210_PCF_SPI1_SCLK)>,
 			 <K210_FPIOA(28, K210_PCF_SPI1_D0)>,
-			 <K210_FPIOA(29, K210_PCF_GPIOHS13)>;
+			 <K210_FPIOA(29, K210_PCF_GPIOHS13)>; /* cs */
 	};
 };
 
@@ -160,3 +160,47 @@ 
 	pinctrl-0 = <&fpioa_dvp>;
 	pinctrl-names = "default";
 };
+
+&spi0 {
+	pinctrl-0 = <&fpioa_spi0>;
+	pinctrl-names = "default";
+	num-cs = <1>;
+	cs-gpios = <&gpio0 20 0>;
+
+	panel@0 {
+		compatible = "sitronix,st7789v";
+		reg = <0>;
+		reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
+		dc-gpios = <&gpio0 22 0>;
+		spi-max-frequency = <15000000>;
+		status = "disabled";
+	};
+};
+
+&spi1 {
+	pinctrl-0 = <&fpioa_spi1>;
+	pinctrl-names = "default";
+	num-cs = <1>;
+	cs-gpios = <&gpio0 13 0>;
+	status = "okay";
+
+	slot@0 {
+		compatible = "mmc-spi-slot";
+		reg = <0>;
+		spi-max-frequency = <25000000>;
+		voltage-ranges = <3300 3300>;
+		broken-cd;
+	};
+};
+
+&spi3 {
+	status = "okay";
+
+	spi-flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+		m25p,fast-read;
+		broken-flash-reset;
+	};
+};
diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi
index 1ae3bf9bdf..98411e63a4 100644
--- a/arch/riscv/dts/k210.dtsi
+++ b/arch/riscv/dts/k210.dtsi
@@ -496,6 +496,8 @@ 
 				interrupts = <24>;
 				clocks = <&sysclk K210_CLK_DVP>;
 				resets = <&sysrst K210_RST_DVP>;
+				kendryte,sysctl = <&sysctl>;
+				kendryte,misc-offset = <K210_SYSCTL_MISC>;
 				status = "disabled";
 			};