diff mbox series

[1/3] reset: stm32: Add support of MCU HOLD BOOT

Message ID 20201015150101.1.Ic4f6a36fa0594203b3f994a9e1d48143b420f072@changeid
State Accepted
Commit d8d29a4489c72ed8cbeafa42ea5c06e26b80a2e5
Delegated to: Patrick Delaunay
Headers show
Series [1/3] reset: stm32: Add support of MCU HOLD BOOT | expand

Commit Message

Patrick DELAUNAY Oct. 15, 2020, 1:01 p.m. UTC
Handle the register RCC_MP_GCR without SET/CLR registers
but with a direct access to bit BOOT_MCU:
- deassert => set the bit: The MCU will not be in HOLD_BOOT
- assert => clear the bit: The MCU will be set in HOLD_BOOT

With this patch the RCC driver handles the MCU_HOLD_BOOT_R value
added in binding stm32mp1-resets.h

Cc: Fabien DESSENNE <fabien.dessenne@st.com>
Cc: Arnaud POULIQUEN <arnaud.pouliquen@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
---

 drivers/reset/stm32-reset.c                 | 17 +++++++++++++----
 include/dt-bindings/reset/stm32mp1-resets.h |  1 +
 2 files changed, 14 insertions(+), 4 deletions(-)

Comments

Patrice CHOTARD Oct. 21, 2020, 11:42 a.m. UTC | #1
Hi Patrick

On 10/15/20 3:01 PM, Patrick Delaunay wrote:
> Handle the register RCC_MP_GCR without SET/CLR registers
> but with a direct access to bit BOOT_MCU:
> - deassert => set the bit: The MCU will not be in HOLD_BOOT
> - assert => clear the bit: The MCU will be set in HOLD_BOOT
>
> With this patch the RCC driver handles the MCU_HOLD_BOOT_R value
> added in binding stm32mp1-resets.h
>
> Cc: Fabien DESSENNE <fabien.dessenne@st.com>
> Cc: Arnaud POULIQUEN <arnaud.pouliquen@st.com>
> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
> ---
>
>  drivers/reset/stm32-reset.c                 | 17 +++++++++++++----
>  include/dt-bindings/reset/stm32mp1-resets.h |  1 +
>  2 files changed, 14 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/reset/stm32-reset.c b/drivers/reset/stm32-reset.c
> index 64a11cfcfc..20c36a99eb 100644
> --- a/drivers/reset/stm32-reset.c
> +++ b/drivers/reset/stm32-reset.c
> @@ -14,6 +14,9 @@
>  #include <asm/io.h>
>  #include <linux/bitops.h>
>  
> +/* offset of register without set/clear management */
> +#define RCC_MP_GCR_OFFSET 0x10C
> +
>  /* reset clear offset for STM32MP RCC */
>  #define RCC_CL 0x4
>  
> @@ -40,8 +43,11 @@ static int stm32_reset_assert(struct reset_ctl *reset_ctl)
>  	      reset_ctl->id, bank, offset);
>  
>  	if (dev_get_driver_data(reset_ctl->dev) == STM32MP1)
> -		/* reset assert is done in rcc set register */
> -		writel(BIT(offset), priv->base + bank);
> +		if (bank != RCC_MP_GCR_OFFSET)
> +			/* reset assert is done in rcc set register */
> +			writel(BIT(offset), priv->base + bank);
> +		else
> +			clrbits_le32(priv->base + bank, BIT(offset));
>  	else
>  		setbits_le32(priv->base + bank, BIT(offset));
>  
> @@ -57,8 +63,11 @@ static int stm32_reset_deassert(struct reset_ctl *reset_ctl)
>  	      reset_ctl->id, bank, offset);
>  
>  	if (dev_get_driver_data(reset_ctl->dev) == STM32MP1)
> -		/* reset deassert is done in rcc clr register */
> -		writel(BIT(offset), priv->base + bank + RCC_CL);
> +		if (bank != RCC_MP_GCR_OFFSET)
> +			/* reset deassert is done in rcc clr register */
> +			writel(BIT(offset), priv->base + bank + RCC_CL);
> +		else
> +			setbits_le32(priv->base + bank, BIT(offset));
>  	else
>  		clrbits_le32(priv->base + bank, BIT(offset));
>  
> diff --git a/include/dt-bindings/reset/stm32mp1-resets.h b/include/dt-bindings/reset/stm32mp1-resets.h
> index f0c3aaef67..702da37a2e 100644
> --- a/include/dt-bindings/reset/stm32mp1-resets.h
> +++ b/include/dt-bindings/reset/stm32mp1-resets.h
> @@ -7,6 +7,7 @@
>  #ifndef _DT_BINDINGS_STM32MP1_RESET_H_
>  #define _DT_BINDINGS_STM32MP1_RESET_H_
>  
> +#define MCU_HOLD_BOOT_R	2144
>  #define LTDC_R		3072
>  #define DSI_R		3076
>  #define DDRPERFM_R	3080

Reviewed-by: Patrice Chotard <patrice.chotard@st.com>

Thanks
Patrick DELAUNAY Nov. 25, 2020, 10:34 a.m. UTC | #2
Hi,

> From: Patrick DELAUNAY <patrick.delaunay@st.com>
> Sent: jeudi 15 octobre 2020 15:01
> 
> Handle the register RCC_MP_GCR without SET/CLR registers but with a direct
> access to bit BOOT_MCU:
> - deassert => set the bit: The MCU will not be in HOLD_BOOT
> - assert => clear the bit: The MCU will be set in HOLD_BOOT
> 
> With this patch the RCC driver handles the MCU_HOLD_BOOT_R value added in
> binding stm32mp1-resets.h
> 
> Cc: Fabien DESSENNE <fabien.dessenne@st.com>
> Cc: Arnaud POULIQUEN <arnaud.pouliquen@st.com>
> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
> ---
> 
>  drivers/reset/stm32-reset.c                 | 17 +++++++++++++----
>  include/dt-bindings/reset/stm32mp1-resets.h |  1 +
>  2 files changed, 14 insertions(+), 4 deletions(-)
> 

Applied to u-boot-stm/master, thanks!

Regards

Patrick
diff mbox series

Patch

diff --git a/drivers/reset/stm32-reset.c b/drivers/reset/stm32-reset.c
index 64a11cfcfc..20c36a99eb 100644
--- a/drivers/reset/stm32-reset.c
+++ b/drivers/reset/stm32-reset.c
@@ -14,6 +14,9 @@ 
 #include <asm/io.h>
 #include <linux/bitops.h>
 
+/* offset of register without set/clear management */
+#define RCC_MP_GCR_OFFSET 0x10C
+
 /* reset clear offset for STM32MP RCC */
 #define RCC_CL 0x4
 
@@ -40,8 +43,11 @@  static int stm32_reset_assert(struct reset_ctl *reset_ctl)
 	      reset_ctl->id, bank, offset);
 
 	if (dev_get_driver_data(reset_ctl->dev) == STM32MP1)
-		/* reset assert is done in rcc set register */
-		writel(BIT(offset), priv->base + bank);
+		if (bank != RCC_MP_GCR_OFFSET)
+			/* reset assert is done in rcc set register */
+			writel(BIT(offset), priv->base + bank);
+		else
+			clrbits_le32(priv->base + bank, BIT(offset));
 	else
 		setbits_le32(priv->base + bank, BIT(offset));
 
@@ -57,8 +63,11 @@  static int stm32_reset_deassert(struct reset_ctl *reset_ctl)
 	      reset_ctl->id, bank, offset);
 
 	if (dev_get_driver_data(reset_ctl->dev) == STM32MP1)
-		/* reset deassert is done in rcc clr register */
-		writel(BIT(offset), priv->base + bank + RCC_CL);
+		if (bank != RCC_MP_GCR_OFFSET)
+			/* reset deassert is done in rcc clr register */
+			writel(BIT(offset), priv->base + bank + RCC_CL);
+		else
+			setbits_le32(priv->base + bank, BIT(offset));
 	else
 		clrbits_le32(priv->base + bank, BIT(offset));
 
diff --git a/include/dt-bindings/reset/stm32mp1-resets.h b/include/dt-bindings/reset/stm32mp1-resets.h
index f0c3aaef67..702da37a2e 100644
--- a/include/dt-bindings/reset/stm32mp1-resets.h
+++ b/include/dt-bindings/reset/stm32mp1-resets.h
@@ -7,6 +7,7 @@ 
 #ifndef _DT_BINDINGS_STM32MP1_RESET_H_
 #define _DT_BINDINGS_STM32MP1_RESET_H_
 
+#define MCU_HOLD_BOOT_R	2144
 #define LTDC_R		3072
 #define DSI_R		3076
 #define DDRPERFM_R	3080