diff mbox series

[v2,11/16] ram: sifive: Default to y only if compiling for fu540

Message ID 20201012181345.338661-12-seanga2@gmail.com
State Superseded
Delegated to: Andes
Headers show
Series riscv: k210: Enable use of AI ram bank | expand

Commit Message

Sean Anderson Oct. 12, 2020, 6:13 p.m. UTC
Other RISC-V targets should not have RAM_SIFIVE enabled by default.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
---

(no changes since v1)

 drivers/ram/sifive/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Rick Chen Nov. 3, 2020, 7:20 a.m. UTC | #1
> Other RISC-V targets should not have RAM_SIFIVE enabled by default.
>
> Signed-off-by: Sean Anderson <seanga2@gmail.com>
> Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
> ---
>
> (no changes since v1)
>
>  drivers/ram/sifive/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>

Reviewed-by: Rick Chen <rick@andestech.com>
diff mbox series

Patch

diff --git a/drivers/ram/sifive/Kconfig b/drivers/ram/sifive/Kconfig
index 6aca22ab2a..b24153d971 100644
--- a/drivers/ram/sifive/Kconfig
+++ b/drivers/ram/sifive/Kconfig
@@ -1,7 +1,7 @@ 
 config RAM_SIFIVE
 	bool "Ram drivers support for SiFive SoCs"
 	depends on RAM && RISCV
-	default y
+	default y if TARGET_SIFIVE_FU540
 	help
 	  This enables support for ram drivers of SiFive SoCs.