| Message ID | 20201009051820.10984-1-qiang.zhao@nxp.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Priyanka Jain |
| Headers | show |
| Series | [v2] armv8: dts: fsl-lx2162a: add dspi node into qds dts | expand |
>-----Original Message----- >From: Qiang Zhao <qiang.zhao@nxp.com> >Sent: Friday, October 9, 2020 10:48 AM >To: Priyanka Jain <priyanka.jain@nxp.com>; Meenakshi Aggarwal ><meenakshi.aggarwal@nxp.com> >Cc: u-boot@lists.denx.de; Qiang Zhao <qiang.zhao@nxp.com> >Subject: [Patch v2] armv8: dts: fsl-lx2162a: add dspi node into qds dts > >From: Zhao Qiang <qiang.zhao@nxp.com> > >Add dspi node into lx2162aqds device tree > >Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> >--- LX2162QDS base support is now merged in fsl-qoriq tree. https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq Kindly rebase this patch. Regards Priyanka
> -----Original Message----- > From: Priyanka Jain <priyanka.jain@nxp.com> > Sent: 2020年12月11日 16:15 > To: Qiang Zhao <qiang.zhao@nxp.com>; Meenakshi Aggarwal > <meenakshi.aggarwal@nxp.com> > Cc: u-boot@lists.denx.de; Qiang Zhao <qiang.zhao@nxp.com> > Subject: RE: [Patch v2] armv8: dts: fsl-lx2162a: add dspi node into qds dts > > >-----Original Message----- > >From: Qiang Zhao <qiang.zhao@nxp.com> > >Sent: Friday, October 9, 2020 10:48 AM > >To: Priyanka Jain <priyanka.jain@nxp.com>; Meenakshi Aggarwal > ><meenakshi.aggarwal@nxp.com> > >Cc: u-boot@lists.denx.de; Qiang Zhao <qiang.zhao@nxp.com> > >Subject: [Patch v2] armv8: dts: fsl-lx2162a: add dspi node into qds dts > > > >From: Zhao Qiang <qiang.zhao@nxp.com> > > > >Add dspi node into lx2162aqds device tree > > > >Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> > >--- > LX2162QDS base support is now merged in fsl-qoriq tree. > https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq > > Kindly rebase this patch. Rebased Best Regards, Qiang Zhao
diff --git a/arch/arm/dts/fsl-lx2162a-qds.dts b/arch/arm/dts/fsl-lx2162a-qds.dts index 57e1913..6211757 100644 --- a/arch/arm/dts/fsl-lx2162a-qds.dts +++ b/arch/arm/dts/fsl-lx2162a-qds.dts @@ -16,6 +16,108 @@ aliases { spi0 = &fspi; + spi1 = &dspi0; + spi2 = &dspi1; + spi3 = &dspi2; + }; +}; + +&dspi0 { + bus-num = <0>; + status = "okay"; + + dflash0: n25q128a { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3000000>; + spi-cpol; + spi-cpha; + reg = <0>; + }; + dflash1: sst25wf040b { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3000000>; + spi-cpol; + spi-cpha; + reg = <1>; + }; + dflash2: en25s64 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3000000>; + spi-cpol; + spi-cpha; + reg = <2>; + }; +}; + +&dspi1 { + bus-num = <0>; + status = "okay"; + + dflash3: n25q128a { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3000000>; + spi-cpol; + spi-cpha; + reg = <0>; + }; + dflash4: sst25wf040b { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3000000>; + spi-cpol; + spi-cpha; + reg = <1>; + }; + dflash5: en25s64 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3000000>; + spi-cpol; + spi-cpha; + reg = <2>; + }; +}; + +&dspi2 { + bus-num = <0>; + status = "okay"; + + dflash6: n25q128a { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3000000>; + spi-cpol; + spi-cpha; + reg = <0>; + }; + dflash7: sst25wf040b { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3000000>; + spi-cpol; + spi-cpha; + reg = <1>; + }; + dflash8: en25s64 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3000000>; + spi-cpol; + spi-cpha; + reg = <2>; }; };