diff mbox series

[07/10] ram: sifive: Default to y only if compiling for fu540

Message ID 20200929141835.38435-8-seanga2@gmail.com
State Superseded
Delegated to: Andes
Headers show
Series riscv: k210: Enable use of AI ram bank | expand

Commit Message

Sean Anderson Sept. 29, 2020, 2:18 p.m. UTC
Other RISC-V targets should not have RAM_SIFIVE enabled by default.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
---

 drivers/ram/sifive/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Pragnesh Patel Sept. 30, 2020, 4:08 a.m. UTC | #1
>-----Original Message-----
>From: Sean Anderson <seanga2@gmail.com>
>Sent: 29 September 2020 19:49
>To: u-boot@lists.denx.de
>Cc: Bin Meng <bmeng.cn@gmail.com>; Rick Chen <rickchen36@gmail.com>;
>Heinrich Schuchardt <xypron.glpk@gmx.de>; Sean Anderson
><seanga2@gmail.com>; Pragnesh Patel <pragnesh.patel@openfive.com>
>Subject: [PATCH 07/10] ram: sifive: Default to y only if compiling for fu540
>
>[External Email] Do not click links or attachments unless you recognize the
>sender and know the content is safe
>
>Other RISC-V targets should not have RAM_SIFIVE enabled by default.
>
>Signed-off-by: Sean Anderson <seanga2@gmail.com>
>---
>
> drivers/ram/sifive/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
diff mbox series

Patch

diff --git a/drivers/ram/sifive/Kconfig b/drivers/ram/sifive/Kconfig
index 6aca22ab2a..b24153d971 100644
--- a/drivers/ram/sifive/Kconfig
+++ b/drivers/ram/sifive/Kconfig
@@ -1,7 +1,7 @@ 
 config RAM_SIFIVE
 	bool "Ram drivers support for SiFive SoCs"
 	depends on RAM && RISCV
-	default y
+	default y if TARGET_SIFIVE_FU540
 	help
 	  This enables support for ram drivers of SiFive SoCs.