From patchwork Fri Sep 18 16:03:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 1367030 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bp.renesas.com Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4BtJXk6QCHz9ryj for ; Sat, 19 Sep 2020 02:03:25 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 008FF824C2; Fri, 18 Sep 2020 18:03:22 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=bp.renesas.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 2F28B824BD; Fri, 18 Sep 2020 18:03:20 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: * X-Spam-Status: No, score=1.5 required=5.0 tests=AC_FROM_MANY_DOTS,BAYES_00, KHOP_HELO_FCRDNS,SPF_HELO_NONE,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.2 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by phobos.denx.de (Postfix) with ESMTP id D8C0C824BD for ; Fri, 18 Sep 2020 18:03:15 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=bp.renesas.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=biju.das.jz@bp.renesas.com X-IronPort-AV: E=Sophos;i="5.77,274,1596466800"; d="scan'208";a="57648965" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 19 Sep 2020 01:03:11 +0900 Received: from localhost.localdomain (unknown [172.29.53.56]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 262684011DFD; Sat, 19 Sep 2020 01:03:09 +0900 (JST) From: Biju Das To: Nobuhiro Iwamatsu , Marek Vasut Cc: Biju Das , u-boot@lists.denx.de, Chris Paterson , Prabhakar Mahadev Lad Subject: [PATCH 1/2] arm: rmobile: Add RZ/G2M SoC Date: Fri, 18 Sep 2020 17:03:06 +0100 Message-Id: <20200918160307.14323-1-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.17.1 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Add CPU and PRR IDs for R8A774A1(a.k.a RZ/G2M) SoC. RZ/Gx SoC's are identical to R-Car SoC's apart from some automotive peripherals and they also share the same PRR CPU ID's. For example the RZ/G2M SoC has the same PRR ID 0x52 as R-Car M3W SoC. To differentiate RZ/G SoC's from R-Car SoC's add a member family_type in struct rmobile_cpuinfo and compare the compatible string from device tree for SoC identification of RZ/G SoC. Also sorted the header alphabetically. Signed-off-by: Biju Das Reviewed-by: Lad Prabhakar --- V1-->V2 Add comments in the code for SoC identification logic for RZ/G SoC's --- arch/arm/mach-rmobile/cpu_info.c | 83 +++++++++++++++----- arch/arm/mach-rmobile/include/mach/rmobile.h | 1 + 2 files changed, 65 insertions(+), 19 deletions(-) diff --git a/arch/arm/mach-rmobile/cpu_info.c b/arch/arm/mach-rmobile/cpu_info.c index fdbbd72e28..d45a474ba9 100644 --- a/arch/arm/mach-rmobile/cpu_info.c +++ b/arch/arm/mach-rmobile/cpu_info.c @@ -3,13 +3,23 @@ * (C) Copyright 2012 Nobuhiro Iwamatsu * (C) Copyright 2012 Renesas Solutions Corp. */ -#include -#include #include -#include #include +#include +#include +#include #include +#include #include +#include + +enum soc_family_type { + SOC_SHMOBILE = 0, + SOC_RMOBILE, + SOC_RZG2, + SOC_RCAR_GEN2, + SOC_RCAR_GEN3, +}; #ifdef CONFIG_ARCH_CPU_INIT int arch_cpu_init(void) @@ -31,6 +41,7 @@ void enable_caches(void) #ifdef CONFIG_DISPLAY_CPUINFO #ifndef CONFIG_RZA1 +DECLARE_GLOBAL_DATA_PTR; static u32 __rmobile_get_cpu_type(void) { return 0x0; @@ -52,36 +63,70 @@ static u32 __rmobile_get_cpu_rev_fraction(void) u32 rmobile_get_cpu_rev_fraction(void) __attribute__((weak, alias("__rmobile_get_cpu_rev_fraction"))); +static const struct udevice_id soc_ids[] = { + { .compatible = "renesas,r8a774a1", .data = SOC_RZG2 }, + { }, +}; + /* CPU infomation table */ static const struct { u16 cpu_type; u8 cpu_name[10]; + enum soc_family_type family_type; } rmobile_cpuinfo[] = { - { RMOBILE_CPU_TYPE_SH73A0, "SH73A0" }, - { RMOBILE_CPU_TYPE_R8A7740, "R8A7740" }, - { RMOBILE_CPU_TYPE_R8A7790, "R8A7790" }, - { RMOBILE_CPU_TYPE_R8A7791, "R8A7791" }, - { RMOBILE_CPU_TYPE_R8A7792, "R8A7792" }, - { RMOBILE_CPU_TYPE_R8A7793, "R8A7793" }, - { RMOBILE_CPU_TYPE_R8A7794, "R8A7794" }, - { RMOBILE_CPU_TYPE_R8A7795, "R8A7795" }, - { RMOBILE_CPU_TYPE_R8A7796, "R8A7796" }, - { RMOBILE_CPU_TYPE_R8A77965, "R8A77965" }, - { RMOBILE_CPU_TYPE_R8A77970, "R8A77970" }, - { RMOBILE_CPU_TYPE_R8A77980, "R8A77980" }, - { RMOBILE_CPU_TYPE_R8A77990, "R8A77990" }, - { RMOBILE_CPU_TYPE_R8A77995, "R8A77995" }, + { RMOBILE_CPU_TYPE_SH73A0, "SH73A0", SOC_SHMOBILE }, + { RMOBILE_CPU_TYPE_R8A7740, "R8A7740", SOC_RMOBILE }, + { RMOBILE_CPU_TYPE_R8A774A1, "R8A774A1", SOC_RZG2 }, + { RMOBILE_CPU_TYPE_R8A7790, "R8A7790", SOC_RCAR_GEN2 }, + { RMOBILE_CPU_TYPE_R8A7791, "R8A7791", SOC_RCAR_GEN2 }, + { RMOBILE_CPU_TYPE_R8A7792, "R8A7792", SOC_RCAR_GEN2 }, + { RMOBILE_CPU_TYPE_R8A7793, "R8A7793", SOC_RCAR_GEN2 }, + { RMOBILE_CPU_TYPE_R8A7794, "R8A7794", SOC_RCAR_GEN2 }, + { RMOBILE_CPU_TYPE_R8A7795, "R8A7795", SOC_RCAR_GEN3 }, + { RMOBILE_CPU_TYPE_R8A7796, "R8A7796", SOC_RCAR_GEN3 }, + { RMOBILE_CPU_TYPE_R8A77965, "R8A77965", SOC_RCAR_GEN3 }, + { RMOBILE_CPU_TYPE_R8A77970, "R8A77970", SOC_RCAR_GEN3 }, + { RMOBILE_CPU_TYPE_R8A77980, "R8A77980", SOC_RCAR_GEN3 }, + { RMOBILE_CPU_TYPE_R8A77990, "R8A77990", SOC_RCAR_GEN3 }, + { RMOBILE_CPU_TYPE_R8A77995, "R8A77995", SOC_RCAR_GEN3 }, { 0x0, "CPU" }, }; +static const struct udevice_id *of_soc_match_compatible(void) +{ + const struct udevice_id *of_match = soc_ids; + int i; + + for (i = 0; i < ARRAY_SIZE(soc_ids); i++) { + if (!fdt_node_check_compatible(gd->fdt_blob, 0, + of_match->compatible)) + return of_match; + of_match++; + } + + return NULL; +} + static int rmobile_cpuinfo_idx(void) { int i = 0; u32 cpu_type = rmobile_get_cpu_type(); + const struct udevice_id *match = of_soc_match_compatible(); + /* + * This loop identifies CPU based on PRR register, it differentiates + * RZ/G SoC's from R-Car SoC's by matching RZ/G SoC compatible string + * from DT against the family_type. + */ for (; i < ARRAY_SIZE(rmobile_cpuinfo); i++) - if (rmobile_cpuinfo[i].cpu_type == cpu_type) - break; + if (rmobile_cpuinfo[i].cpu_type == cpu_type) { + if (match && + rmobile_cpuinfo[i].family_type == match->data) + break; + else if (!match && + rmobile_cpuinfo[i].family_type != SOC_RZG2) + break; + } return i; } diff --git a/arch/arm/mach-rmobile/include/mach/rmobile.h b/arch/arm/mach-rmobile/include/mach/rmobile.h index a50249dc96..8bb64f59dd 100644 --- a/arch/arm/mach-rmobile/include/mach/rmobile.h +++ b/arch/arm/mach-rmobile/include/mach/rmobile.h @@ -27,6 +27,7 @@ /* PRR CPU IDs */ #define RMOBILE_CPU_TYPE_SH73A0 0x37 #define RMOBILE_CPU_TYPE_R8A7740 0x40 +#define RMOBILE_CPU_TYPE_R8A774A1 0x52 #define RMOBILE_CPU_TYPE_R8A7790 0x45 #define RMOBILE_CPU_TYPE_R8A7791 0x47 #define RMOBILE_CPU_TYPE_R8A7792 0x4A