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[5/5] sunxi: add drivers and configs needed for LCD display

Message ID 20200916141052.4808-6-m.cerveny@computer.org
State New
Delegated to: Jagannadha Sutradharudu Teki
Headers show
Series sunxi: video: Add V3S simple-framebuffer | expand

Commit Message

Martin Cerveny Sept. 16, 2020, 2:10 p.m. UTC
Add PWM and dummy power regulator support.
Modify data timings for LCD displays.

Signed-off-by: Martin Cerveny <m.cerveny@computer.org>
---
 configs/LicheePi_Zero_defconfig | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Martin Cerveny Sept. 16, 2020, 3:44 p.m. UTC | #1
On Wed, 16 Sep 2020, Maxime Ripard wrote:
> On Wed, Sep 16, 2020 at 04:10:52PM +0200, Martin Cerveny wrote:
>> Add PWM and dummy power regulator support.
>> Modify data timings for LCD displays.
>>
>> Signed-off-by: Martin Cerveny <m.cerveny@computer.org>
>> ---
>>  configs/LicheePi_Zero_defconfig | 4 ++++
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/configs/LicheePi_Zero_defconfig b/configs/LicheePi_Zero_defconfig
>> index 04d7b64504..ba1c085ec3 100644
>> --- a/configs/LicheePi_Zero_defconfig
>> +++ b/configs/LicheePi_Zero_defconfig
>> @@ -3,5 +3,9 @@ CONFIG_ARCH_SUNXI=y
>>  CONFIG_SPL=y
>>  CONFIG_MACH_SUN8I_V3S=y
>>  CONFIG_DRAM_CLK=360
>> +CONFIG_VIDEO_LCD_DCLK_PHASE=0
>>  CONFIG_DEFAULT_DEVICE_TREE="sun8i-v3s-licheepi-zero"
>>  # CONFIG_NETDEVICES is not set
>> +CONFIG_DM_REGULATOR=y
>> +CONFIG_DM_PWM=y
>> +CONFIG_PWM_SUNXI=y
>
> The LicheePi Zero doesn't have any display by default. Also you're
> mentionning in your commit log that you "modify data timings", but I
> don't see any timings in there?

CONFIG_VIDEO_LCD_DCLK_PHASE is LCD data clock phase,
standard "1" corrupts output on display,
see
- register "TCON0_IO_POL_REG" in V3S manual
- arch/arm/mach-sunxi/Kconfig

Regards.
Maxime Ripard Sept. 21, 2020, 12:59 p.m. UTC | #2
On Wed, Sep 16, 2020 at 05:44:58PM +0200, Martin Cerveny wrote:
> 
> 
> On Wed, 16 Sep 2020, Maxime Ripard wrote:
> > On Wed, Sep 16, 2020 at 04:10:52PM +0200, Martin Cerveny wrote:
> > > Add PWM and dummy power regulator support.
> > > Modify data timings for LCD displays.
> > > 
> > > Signed-off-by: Martin Cerveny <m.cerveny@computer.org>
> > > ---
> > >  configs/LicheePi_Zero_defconfig | 4 ++++
> > >  1 file changed, 4 insertions(+)
> > > 
> > > diff --git a/configs/LicheePi_Zero_defconfig b/configs/LicheePi_Zero_defconfig
> > > index 04d7b64504..ba1c085ec3 100644
> > > --- a/configs/LicheePi_Zero_defconfig
> > > +++ b/configs/LicheePi_Zero_defconfig
> > > @@ -3,5 +3,9 @@ CONFIG_ARCH_SUNXI=y
> > >  CONFIG_SPL=y
> > >  CONFIG_MACH_SUN8I_V3S=y
> > >  CONFIG_DRAM_CLK=360
> > > +CONFIG_VIDEO_LCD_DCLK_PHASE=0
> > >  CONFIG_DEFAULT_DEVICE_TREE="sun8i-v3s-licheepi-zero"
> > >  # CONFIG_NETDEVICES is not set
> > > +CONFIG_DM_REGULATOR=y
> > > +CONFIG_DM_PWM=y
> > > +CONFIG_PWM_SUNXI=y
> > 
> > The LicheePi Zero doesn't have any display by default. Also you're
> > mentionning in your commit log that you "modify data timings", but I
> > don't see any timings in there?
> 
> CONFIG_VIDEO_LCD_DCLK_PHASE is LCD data clock phase,
> standard "1" corrupts output on display,
> see
> - register "TCON0_IO_POL_REG" in V3S manual
> - arch/arm/mach-sunxi/Kconfig

So just call the phase of the data signal. Timings for LCD displays have
a very different meaning.

Maxime
diff mbox series

Patch

diff --git a/configs/LicheePi_Zero_defconfig b/configs/LicheePi_Zero_defconfig
index 04d7b64504..ba1c085ec3 100644
--- a/configs/LicheePi_Zero_defconfig
+++ b/configs/LicheePi_Zero_defconfig
@@ -3,5 +3,9 @@  CONFIG_ARCH_SUNXI=y
 CONFIG_SPL=y
 CONFIG_MACH_SUN8I_V3S=y
 CONFIG_DRAM_CLK=360
+CONFIG_VIDEO_LCD_DCLK_PHASE=0
 CONFIG_DEFAULT_DEVICE_TREE="sun8i-v3s-licheepi-zero"
 # CONFIG_NETDEVICES is not set
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_SUNXI=y