From patchwork Sat Sep 12 23:35:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1362980 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=denx.de header.i=@denx.de header.a=rsa-sha256 header.s=phobos-20191101 header.b=sU1hQhVj; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4BppsG6dxmz9sTK for ; Sun, 13 Sep 2020 09:35:44 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 4264182242; Sun, 13 Sep 2020 01:35:33 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1599953733; bh=Tom87PM3+nps9VkuxE0p4/5W1bYu7RSrXKfTEmA7xto=; h=From:To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From; b=sU1hQhVjm75W2Yk+wwoxTSFZ3EueiDo29q3wmAvCbX/lI66mRrQ+v2azzPER657/L TB0d03unHoOQzuc6zd/9UiYudNQmEwL2Tw5Bzz4XcAj+GiX9mJ+pzH9FtUP4IqomX/ 0ohZYdI8W8MGbDBzay23zX6fg+K74a+ZgXT/o8tuYebniS9Lx6BMTLJt4Quz1n60xD 68sVUQzhGEq/tSAfd6XanK9c8s1OtE69Nq8emo7zcbzU4IktiWhY11lnNlNJtoOpJd lgnGU8sMTzaXjLFrCV5dsVYe63tBpmvUvy+nnQjR8t+9S+enGcgfq1+DjtpMYriMK5 CKGknuCLxOuEg== Received: by phobos.denx.de (Postfix, from userid 109) id EDC39822B5; Sun, 13 Sep 2020 01:35:31 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 9B9BB821ED for ; Sun, 13 Sep 2020 01:35:29 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=marex@denx.de Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 4Bpprx28bGz1rfc8; Sun, 13 Sep 2020 01:35:29 +0200 (CEST) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 4Bpprx1jXzz1qqkV; Sun, 13 Sep 2020 01:35:29 +0200 (CEST) Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id OsRR0b-gfkrG; Sun, 13 Sep 2020 01:35:28 +0200 (CEST) X-Auth-Info: ofWZZZ+Qao4h19YveBEwdD2MS2wPNBXgM9Bu7ubCm7I= Received: from desktop.lan (ip-89-176-112-137.net.upcbroadband.cz [89.176.112.137]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Sun, 13 Sep 2020 01:35:28 +0200 (CEST) From: Marek Vasut To: u-boot@lists.denx.de Cc: Marek Vasut , Eric Nelson , Fabio Estevam , Stefano Babic Subject: [PATCH] ARM: mx6: ddr: Add support for iMX6UL/ULL/SL/SDL Date: Sun, 13 Sep 2020 01:35:08 +0200 Message-Id: <20200912233508.55406-1-marex@denx.de> X-Mailer: git-send-email 2.28.0 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean This patch adds support for iMX6UL/ULL/SL/SDL MMDC into the DDR calibration code. The difference between MX6DQ and MX6UL/ULL/SL is that the later SoCs have 2 SDQS registers, just like MX6SX, while the MX6DQ/MX6SDL has 8. Fixes: 4f4c128c65 ("ARM: mx6: ddr: Add support for iMX6SX") Signed-off-by: Marek Vasut Cc: Eric Nelson Cc: Fabio Estevam Cc: Stefano Babic Reviewed-by: Fabio Estevam --- arch/arm/mach-imx/mx6/ddr.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c index 16df71083d..f872bfdab3 100644 --- a/arch/arm/mach-imx/mx6/ddr.c +++ b/arch/arm/mach-imx/mx6/ddr.c @@ -250,16 +250,31 @@ int mmdc_do_write_level_calibration(struct mx6_ddr_sysinfo const *sysinfo) static void mmdc_set_sdqs(bool set) { + struct mx6sdl_iomux_ddr_regs *mx6sdl_ddr_iomux = + (struct mx6sdl_iomux_ddr_regs *)MX6SDL_IOM_DDR_BASE; struct mx6dq_iomux_ddr_regs *mx6dq_ddr_iomux = (struct mx6dq_iomux_ddr_regs *)MX6DQ_IOM_DDR_BASE; struct mx6sx_iomux_ddr_regs *mx6sx_ddr_iomux = (struct mx6sx_iomux_ddr_regs *)MX6SX_IOM_DDR_BASE; + struct mx6sl_iomux_ddr_regs *mx6sl_ddr_iomux = + (struct mx6sl_iomux_ddr_regs *)MX6SL_IOM_DDR_BASE; + struct mx6ul_iomux_ddr_regs *mx6ul_ddr_iomux = + (struct mx6ul_iomux_ddr_regs *)MX6UL_IOM_DDR_BASE; int i, sdqs_cnt; u32 sdqs; if (is_mx6sx()) { sdqs = (u32)(&mx6sx_ddr_iomux->dram_sdqs0); sdqs_cnt = 2; + } else if (is_mx6sl()) { + sdqs = (u32)(&mx6sl_ddr_iomux->dram_sdqs0); + sdqs_cnt = 2; + } else if (is_mx6ul() || is_mx6ull()) { + sdqs = (u32)(&mx6ul_ddr_iomux->dram_sdqs0); + sdqs_cnt = 2; + } else if (is_mx6sdl()) { + sdqs = (u32)(&mx6sdl_ddr_iomux->dram_sdqs0); + sdqs_cnt = 8; } else { /* MX6DQ */ sdqs = (u32)(&mx6dq_ddr_iomux->dram_sdqs0); sdqs_cnt = 8;