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[v3,05/57] x86: apl: Correct PCIE_ECAM_BASE

Message ID 20200906154340.v3.5.I6f15c116cfec682dce106c6c30c2325846f6c232@changeid
State Superseded
Delegated to: Bin Meng
Headers show
Series dm: Add programatic generation of ACPI tables (part D) | expand

Commit Message

Simon Glass Sept. 6, 2020, 9:43 p.m. UTC 
This value is incorrect and causes problems booting Linux. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 board/google/chromebook_coral/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Bin Meng Sept. 22, 2020, 7:30 a.m. UTC | #1 
On Mon, Sep 7, 2020 at 5:44 AM Simon Glass <sjg@chromium.org> wrote:
>
> This value is incorrect and causes problems booting Linux. Fix it.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
> (no changes since v1)
>
>  board/google/chromebook_coral/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
diff mbox series

Patch

diff --git a/board/google/chromebook_coral/Kconfig b/board/google/chromebook_coral/Kconfig
index 27671958e14..53c651c3f9e 100644
--- a/board/google/chromebook_coral/Kconfig
+++ b/board/google/chromebook_coral/Kconfig
@@ -23,7 +23,7 @@  config BOARD_SPECIFIC_OPTIONS # dummy
 	select BOARD_ROMSIZE_KB_16384
 
 config PCIE_ECAM_BASE
-	default 0xf0000000
+	default 0xe0000000
 
 config EARLY_POST_CROS_EC
 	bool "Enable early post to Chrome OS EC"