| Message ID | 20200902111804.22043-6-faiz_abbas@ti.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Lokesh Vutla |
| Headers | show |
| Series | Add spi boot support to am335x-icev2 | expand |
On 02/09/20 4:48 pm, Faiz Abbas wrote: > Add platform data and a device structure for the spi device > present on am335x-icev2. This requires moving all omap3_spi > platform data structures and symbols to an omap3_spi.h so that > the board file can access them. > > Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> > --- > arch/arm/mach-omap2/am33xx/board.c | 12 +++++ > drivers/spi/omap3_spi.c | 70 +-------------------------- > include/configs/am335x_evm.h | 4 ++ > include/omap3_spi.h | 78 ++++++++++++++++++++++++++++++ > 4 files changed, 95 insertions(+), 69 deletions(-) > create mode 100644 include/omap3_spi.h > > diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c > index a7b56b6bb3..2c2b38721f 100644 > --- a/arch/arm/mach-omap2/am33xx/board.c > +++ b/arch/arm/mach-omap2/am33xx/board.c > @@ -14,6 +14,7 @@ > #include <init.h> > #include <net.h> > #include <ns16550.h> > +#include <omap3_spi.h> > #include <spl.h> > #include <asm/arch/cpu.h> > #include <asm/arch/hardware.h> > @@ -142,6 +143,17 @@ U_BOOT_DEVICES(am33xx_gpios) = { > #endif > }; > #endif > +#if CONFIG_IS_ENABLED(DM_SPI) && !CONFIG_IS_ENABLED(OF_CONTROL) > +static const struct omap3_spi_plat omap3_spi_pdata = { > + .regs = (struct mcspi *)AM33XX_SPI_OFFSET, > + .pin_dir = MCSPI_PINDIR_D0_IN_D1_OUT, > +}; > + > +U_BOOT_DEVICE(am33xx_spi) = { > + .name = "omap3_spi", > + .platdata = &omap3_spi_pdata, > +}; > +#endif > #endif > > #if !CONFIG_IS_ENABLED(DM_GPIO) > diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c > index 08daacf6f0..56cb217486 100644 > --- a/drivers/spi/omap3_spi.c > +++ b/drivers/spi/omap3_spi.c > @@ -22,82 +22,14 @@ > #include <malloc.h> > #include <asm/io.h> > #include <linux/bitops.h> > +#include <omap3_spi.h> > > DECLARE_GLOBAL_DATA_PTR; > > -#define OMAP4_MCSPI_REG_OFFSET 0x100 > - > struct omap2_mcspi_platform_config { > unsigned int regs_offset; > }; > > -/* per-register bitmasks */ > -#define OMAP3_MCSPI_SYSCONFIG_SMARTIDLE (2 << 3) > -#define OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP BIT(2) > -#define OMAP3_MCSPI_SYSCONFIG_AUTOIDLE BIT(0) > -#define OMAP3_MCSPI_SYSCONFIG_SOFTRESET BIT(1) > - > -#define OMAP3_MCSPI_SYSSTATUS_RESETDONE BIT(0) > - > -#define OMAP3_MCSPI_MODULCTRL_SINGLE BIT(0) > -#define OMAP3_MCSPI_MODULCTRL_MS BIT(2) > -#define OMAP3_MCSPI_MODULCTRL_STEST BIT(3) > - > -#define OMAP3_MCSPI_CHCONF_PHA BIT(0) > -#define OMAP3_MCSPI_CHCONF_POL BIT(1) > -#define OMAP3_MCSPI_CHCONF_CLKD_MASK GENMASK(5, 2) > -#define OMAP3_MCSPI_CHCONF_EPOL BIT(6) > -#define OMAP3_MCSPI_CHCONF_WL_MASK GENMASK(11, 7) > -#define OMAP3_MCSPI_CHCONF_TRM_RX_ONLY BIT(12) > -#define OMAP3_MCSPI_CHCONF_TRM_TX_ONLY BIT(13) > -#define OMAP3_MCSPI_CHCONF_TRM_MASK GENMASK(13, 12) > -#define OMAP3_MCSPI_CHCONF_DMAW BIT(14) > -#define OMAP3_MCSPI_CHCONF_DMAR BIT(15) > -#define OMAP3_MCSPI_CHCONF_DPE0 BIT(16) > -#define OMAP3_MCSPI_CHCONF_DPE1 BIT(17) > -#define OMAP3_MCSPI_CHCONF_IS BIT(18) > -#define OMAP3_MCSPI_CHCONF_TURBO BIT(19) > -#define OMAP3_MCSPI_CHCONF_FORCE BIT(20) > - > -#define OMAP3_MCSPI_CHSTAT_RXS BIT(0) > -#define OMAP3_MCSPI_CHSTAT_TXS BIT(1) > -#define OMAP3_MCSPI_CHSTAT_EOT BIT(2) > - > -#define OMAP3_MCSPI_CHCTRL_EN BIT(0) > -#define OMAP3_MCSPI_CHCTRL_DIS (0 << 0) > - > -#define OMAP3_MCSPI_WAKEUPENABLE_WKEN BIT(0) > -#define MCSPI_PINDIR_D0_IN_D1_OUT 0 > -#define MCSPI_PINDIR_D0_OUT_D1_IN 1 > - > -#define OMAP3_MCSPI_MAX_FREQ 48000000 > -#define SPI_WAIT_TIMEOUT 10 > - > -/* OMAP3 McSPI registers */ > -struct mcspi_channel { > - unsigned int chconf; /* 0x2C, 0x40, 0x54, 0x68 */ > - unsigned int chstat; /* 0x30, 0x44, 0x58, 0x6C */ > - unsigned int chctrl; /* 0x34, 0x48, 0x5C, 0x70 */ > - unsigned int tx; /* 0x38, 0x4C, 0x60, 0x74 */ > - unsigned int rx; /* 0x3C, 0x50, 0x64, 0x78 */ > -}; > - > -struct mcspi { > - unsigned char res1[0x10]; > - unsigned int sysconfig; /* 0x10 */ > - unsigned int sysstatus; /* 0x14 */ > - unsigned int irqstatus; /* 0x18 */ > - unsigned int irqenable; /* 0x1C */ > - unsigned int wakeupenable; /* 0x20 */ > - unsigned int syst; /* 0x24 */ > - unsigned int modulctrl; /* 0x28 */ > - struct mcspi_channel channel[4]; > - /* channel0: 0x2C - 0x3C, bus 0 & 1 & 2 & 3 */ > - /* channel1: 0x40 - 0x50, bus 0 & 1 */ > - /* channel2: 0x54 - 0x64, bus 0 & 1 */ > - /* channel3: 0x68 - 0x78, bus 0 */ > -}; > - > struct omap3_spi_priv { > struct mcspi *regs; > unsigned int cs; > diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h > index 9c4ef369c5..db1a89ad30 100644 > --- a/include/configs/am335x_evm.h > +++ b/include/configs/am335x_evm.h > @@ -281,6 +281,10 @@ > #endif > > /* SPI flash. */ > +#if CONFIG_IS_ENABLED(DM_SPI) > +#define AM33XX_SPI_BASE 0x48030000 > +#define AM33XX_SPI_OFFSET (AM33XX_SPI_BASE + OMAP4_MCSPI_REG_OFFSET) Can we get the SPI base from DT? Thanks and regards, Lokesh
Hi Lokesh, On 07/09/20 12:08 pm, Lokesh Vutla wrote: > > > On 02/09/20 4:48 pm, Faiz Abbas wrote: >> Add platform data and a device structure for the spi device >> present on am335x-icev2. This requires moving all omap3_spi >> platform data structures and symbols to an omap3_spi.h so that >> the board file can access them. >> >> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> >> --- >> arch/arm/mach-omap2/am33xx/board.c | 12 +++++ >> drivers/spi/omap3_spi.c | 70 +-------------------------- >> include/configs/am335x_evm.h | 4 ++ >> include/omap3_spi.h | 78 ++++++++++++++++++++++++++++++ >> 4 files changed, 95 insertions(+), 69 deletions(-) >> create mode 100644 include/omap3_spi.h >> >> diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c >> index a7b56b6bb3..2c2b38721f 100644 >> --- a/arch/arm/mach-omap2/am33xx/board.c >> +++ b/arch/arm/mach-omap2/am33xx/board.c >> @@ -14,6 +14,7 @@ >> #include <init.h> >> #include <net.h> >> #include <ns16550.h> >> +#include <omap3_spi.h> >> #include <spl.h> >> #include <asm/arch/cpu.h> >> #include <asm/arch/hardware.h> >> @@ -142,6 +143,17 @@ U_BOOT_DEVICES(am33xx_gpios) = { >> #endif >> }; >> #endif >> +#if CONFIG_IS_ENABLED(DM_SPI) && !CONFIG_IS_ENABLED(OF_CONTROL) >> +static const struct omap3_spi_plat omap3_spi_pdata = { >> + .regs = (struct mcspi *)AM33XX_SPI_OFFSET, >> + .pin_dir = MCSPI_PINDIR_D0_IN_D1_OUT, >> +}; >> + >> +U_BOOT_DEVICE(am33xx_spi) = { >> + .name = "omap3_spi", >> + .platdata = &omap3_spi_pdata, >> +}; >> +#endif >> #endif >> >> #if !CONFIG_IS_ENABLED(DM_GPIO) >> diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c >> index 08daacf6f0..56cb217486 100644 >> --- a/drivers/spi/omap3_spi.c >> +++ b/drivers/spi/omap3_spi.c >> @@ -22,82 +22,14 @@ >> #include <malloc.h> >> #include <asm/io.h> >> #include <linux/bitops.h> >> +#include <omap3_spi.h> >> >> DECLARE_GLOBAL_DATA_PTR; >> >> -#define OMAP4_MCSPI_REG_OFFSET 0x100 >> - >> struct omap2_mcspi_platform_config { >> unsigned int regs_offset; >> }; >> >> -/* per-register bitmasks */ >> -#define OMAP3_MCSPI_SYSCONFIG_SMARTIDLE (2 << 3) >> -#define OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP BIT(2) >> -#define OMAP3_MCSPI_SYSCONFIG_AUTOIDLE BIT(0) >> -#define OMAP3_MCSPI_SYSCONFIG_SOFTRESET BIT(1) >> - >> -#define OMAP3_MCSPI_SYSSTATUS_RESETDONE BIT(0) >> - >> -#define OMAP3_MCSPI_MODULCTRL_SINGLE BIT(0) >> -#define OMAP3_MCSPI_MODULCTRL_MS BIT(2) >> -#define OMAP3_MCSPI_MODULCTRL_STEST BIT(3) >> - >> -#define OMAP3_MCSPI_CHCONF_PHA BIT(0) >> -#define OMAP3_MCSPI_CHCONF_POL BIT(1) >> -#define OMAP3_MCSPI_CHCONF_CLKD_MASK GENMASK(5, 2) >> -#define OMAP3_MCSPI_CHCONF_EPOL BIT(6) >> -#define OMAP3_MCSPI_CHCONF_WL_MASK GENMASK(11, 7) >> -#define OMAP3_MCSPI_CHCONF_TRM_RX_ONLY BIT(12) >> -#define OMAP3_MCSPI_CHCONF_TRM_TX_ONLY BIT(13) >> -#define OMAP3_MCSPI_CHCONF_TRM_MASK GENMASK(13, 12) >> -#define OMAP3_MCSPI_CHCONF_DMAW BIT(14) >> -#define OMAP3_MCSPI_CHCONF_DMAR BIT(15) >> -#define OMAP3_MCSPI_CHCONF_DPE0 BIT(16) >> -#define OMAP3_MCSPI_CHCONF_DPE1 BIT(17) >> -#define OMAP3_MCSPI_CHCONF_IS BIT(18) >> -#define OMAP3_MCSPI_CHCONF_TURBO BIT(19) >> -#define OMAP3_MCSPI_CHCONF_FORCE BIT(20) >> - >> -#define OMAP3_MCSPI_CHSTAT_RXS BIT(0) >> -#define OMAP3_MCSPI_CHSTAT_TXS BIT(1) >> -#define OMAP3_MCSPI_CHSTAT_EOT BIT(2) >> - >> -#define OMAP3_MCSPI_CHCTRL_EN BIT(0) >> -#define OMAP3_MCSPI_CHCTRL_DIS (0 << 0) >> - >> -#define OMAP3_MCSPI_WAKEUPENABLE_WKEN BIT(0) >> -#define MCSPI_PINDIR_D0_IN_D1_OUT 0 >> -#define MCSPI_PINDIR_D0_OUT_D1_IN 1 >> - >> -#define OMAP3_MCSPI_MAX_FREQ 48000000 >> -#define SPI_WAIT_TIMEOUT 10 >> - >> -/* OMAP3 McSPI registers */ >> -struct mcspi_channel { >> - unsigned int chconf; /* 0x2C, 0x40, 0x54, 0x68 */ >> - unsigned int chstat; /* 0x30, 0x44, 0x58, 0x6C */ >> - unsigned int chctrl; /* 0x34, 0x48, 0x5C, 0x70 */ >> - unsigned int tx; /* 0x38, 0x4C, 0x60, 0x74 */ >> - unsigned int rx; /* 0x3C, 0x50, 0x64, 0x78 */ >> -}; >> - >> -struct mcspi { >> - unsigned char res1[0x10]; >> - unsigned int sysconfig; /* 0x10 */ >> - unsigned int sysstatus; /* 0x14 */ >> - unsigned int irqstatus; /* 0x18 */ >> - unsigned int irqenable; /* 0x1C */ >> - unsigned int wakeupenable; /* 0x20 */ >> - unsigned int syst; /* 0x24 */ >> - unsigned int modulctrl; /* 0x28 */ >> - struct mcspi_channel channel[4]; >> - /* channel0: 0x2C - 0x3C, bus 0 & 1 & 2 & 3 */ >> - /* channel1: 0x40 - 0x50, bus 0 & 1 */ >> - /* channel2: 0x54 - 0x64, bus 0 & 1 */ >> - /* channel3: 0x68 - 0x78, bus 0 */ >> -}; >> - >> struct omap3_spi_priv { >> struct mcspi *regs; >> unsigned int cs; >> diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h >> index 9c4ef369c5..db1a89ad30 100644 >> --- a/include/configs/am335x_evm.h >> +++ b/include/configs/am335x_evm.h >> @@ -281,6 +281,10 @@ >> #endif >> >> /* SPI flash. */ >> +#if CONFIG_IS_ENABLED(DM_SPI) >> +#define AM33XX_SPI_BASE 0x48030000 >> +#define AM33XX_SPI_OFFSET (AM33XX_SPI_BASE + OMAP4_MCSPI_REG_OFFSET) > > Can we get the SPI base from DT? > We are doing that in U-boot (see the ofdata_to_platdata() callback in patch 4). We need hardcoded static platdata for SPL. Was this not clear from the commit message? Thanks, Faiz
On 9/7/20 12:36 PM, Faiz Abbas wrote: > Hi Lokesh, > > On 07/09/20 12:08 pm, Lokesh Vutla wrote: >> >> >> On 02/09/20 4:48 pm, Faiz Abbas wrote: >>> Add platform data and a device structure for the spi device >>> present on am335x-icev2. This requires moving all omap3_spi >>> platform data structures and symbols to an omap3_spi.h so that >>> the board file can access them. >>> >>> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> >>> --- >>> arch/arm/mach-omap2/am33xx/board.c | 12 +++++ >>> drivers/spi/omap3_spi.c | 70 +-------------------------- >>> include/configs/am335x_evm.h | 4 ++ >>> include/omap3_spi.h | 78 ++++++++++++++++++++++++++++++ >>> 4 files changed, 95 insertions(+), 69 deletions(-) >>> create mode 100644 include/omap3_spi.h >>> >>> diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c >>> index a7b56b6bb3..2c2b38721f 100644 >>> --- a/arch/arm/mach-omap2/am33xx/board.c >>> +++ b/arch/arm/mach-omap2/am33xx/board.c >>> @@ -14,6 +14,7 @@ >>> #include <init.h> >>> #include <net.h> >>> #include <ns16550.h> >>> +#include <omap3_spi.h> >>> #include <spl.h> >>> #include <asm/arch/cpu.h> >>> #include <asm/arch/hardware.h> >>> @@ -142,6 +143,17 @@ U_BOOT_DEVICES(am33xx_gpios) = { >>> #endif >>> }; >>> #endif >>> +#if CONFIG_IS_ENABLED(DM_SPI) && !CONFIG_IS_ENABLED(OF_CONTROL) >>> +static const struct omap3_spi_plat omap3_spi_pdata = { >>> + .regs = (struct mcspi *)AM33XX_SPI_OFFSET, >>> + .pin_dir = MCSPI_PINDIR_D0_IN_D1_OUT, >>> +}; >>> + >>> +U_BOOT_DEVICE(am33xx_spi) = { >>> + .name = "omap3_spi", >>> + .platdata = &omap3_spi_pdata, >>> +}; >>> +#endif >>> #endif >>> >>> #if !CONFIG_IS_ENABLED(DM_GPIO) >>> diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c >>> index 08daacf6f0..56cb217486 100644 >>> --- a/drivers/spi/omap3_spi.c >>> +++ b/drivers/spi/omap3_spi.c >>> @@ -22,82 +22,14 @@ >>> #include <malloc.h> >>> #include <asm/io.h> >>> #include <linux/bitops.h> >>> +#include <omap3_spi.h> >>> >>> DECLARE_GLOBAL_DATA_PTR; >>> >>> -#define OMAP4_MCSPI_REG_OFFSET 0x100 >>> - >>> struct omap2_mcspi_platform_config { >>> unsigned int regs_offset; >>> }; >>> >>> -/* per-register bitmasks */ >>> -#define OMAP3_MCSPI_SYSCONFIG_SMARTIDLE (2 << 3) >>> -#define OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP BIT(2) >>> -#define OMAP3_MCSPI_SYSCONFIG_AUTOIDLE BIT(0) >>> -#define OMAP3_MCSPI_SYSCONFIG_SOFTRESET BIT(1) >>> - >>> -#define OMAP3_MCSPI_SYSSTATUS_RESETDONE BIT(0) >>> - >>> -#define OMAP3_MCSPI_MODULCTRL_SINGLE BIT(0) >>> -#define OMAP3_MCSPI_MODULCTRL_MS BIT(2) >>> -#define OMAP3_MCSPI_MODULCTRL_STEST BIT(3) >>> - >>> -#define OMAP3_MCSPI_CHCONF_PHA BIT(0) >>> -#define OMAP3_MCSPI_CHCONF_POL BIT(1) >>> -#define OMAP3_MCSPI_CHCONF_CLKD_MASK GENMASK(5, 2) >>> -#define OMAP3_MCSPI_CHCONF_EPOL BIT(6) >>> -#define OMAP3_MCSPI_CHCONF_WL_MASK GENMASK(11, 7) >>> -#define OMAP3_MCSPI_CHCONF_TRM_RX_ONLY BIT(12) >>> -#define OMAP3_MCSPI_CHCONF_TRM_TX_ONLY BIT(13) >>> -#define OMAP3_MCSPI_CHCONF_TRM_MASK GENMASK(13, 12) >>> -#define OMAP3_MCSPI_CHCONF_DMAW BIT(14) >>> -#define OMAP3_MCSPI_CHCONF_DMAR BIT(15) >>> -#define OMAP3_MCSPI_CHCONF_DPE0 BIT(16) >>> -#define OMAP3_MCSPI_CHCONF_DPE1 BIT(17) >>> -#define OMAP3_MCSPI_CHCONF_IS BIT(18) >>> -#define OMAP3_MCSPI_CHCONF_TURBO BIT(19) >>> -#define OMAP3_MCSPI_CHCONF_FORCE BIT(20) >>> - >>> -#define OMAP3_MCSPI_CHSTAT_RXS BIT(0) >>> -#define OMAP3_MCSPI_CHSTAT_TXS BIT(1) >>> -#define OMAP3_MCSPI_CHSTAT_EOT BIT(2) >>> - >>> -#define OMAP3_MCSPI_CHCTRL_EN BIT(0) >>> -#define OMAP3_MCSPI_CHCTRL_DIS (0 << 0) >>> - >>> -#define OMAP3_MCSPI_WAKEUPENABLE_WKEN BIT(0) >>> -#define MCSPI_PINDIR_D0_IN_D1_OUT 0 >>> -#define MCSPI_PINDIR_D0_OUT_D1_IN 1 >>> - >>> -#define OMAP3_MCSPI_MAX_FREQ 48000000 >>> -#define SPI_WAIT_TIMEOUT 10 >>> - >>> -/* OMAP3 McSPI registers */ >>> -struct mcspi_channel { >>> - unsigned int chconf; /* 0x2C, 0x40, 0x54, 0x68 */ >>> - unsigned int chstat; /* 0x30, 0x44, 0x58, 0x6C */ >>> - unsigned int chctrl; /* 0x34, 0x48, 0x5C, 0x70 */ >>> - unsigned int tx; /* 0x38, 0x4C, 0x60, 0x74 */ >>> - unsigned int rx; /* 0x3C, 0x50, 0x64, 0x78 */ >>> -}; >>> - >>> -struct mcspi { >>> - unsigned char res1[0x10]; >>> - unsigned int sysconfig; /* 0x10 */ >>> - unsigned int sysstatus; /* 0x14 */ >>> - unsigned int irqstatus; /* 0x18 */ >>> - unsigned int irqenable; /* 0x1C */ >>> - unsigned int wakeupenable; /* 0x20 */ >>> - unsigned int syst; /* 0x24 */ >>> - unsigned int modulctrl; /* 0x28 */ >>> - struct mcspi_channel channel[4]; >>> - /* channel0: 0x2C - 0x3C, bus 0 & 1 & 2 & 3 */ >>> - /* channel1: 0x40 - 0x50, bus 0 & 1 */ >>> - /* channel2: 0x54 - 0x64, bus 0 & 1 */ >>> - /* channel3: 0x68 - 0x78, bus 0 */ >>> -}; >>> - >>> struct omap3_spi_priv { >>> struct mcspi *regs; >>> unsigned int cs; >>> diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h >>> index 9c4ef369c5..db1a89ad30 100644 >>> --- a/include/configs/am335x_evm.h >>> +++ b/include/configs/am335x_evm.h >>> @@ -281,6 +281,10 @@ >>> #endif >>> >>> /* SPI flash. */ >>> +#if CONFIG_IS_ENABLED(DM_SPI) >>> +#define AM33XX_SPI_BASE 0x48030000 Could this be more specific? AM33XX_SPI<instance num>_BASE? >>> +#define AM33XX_SPI_OFFSET (AM33XX_SPI_BASE + OMAP4_MCSPI_REG_OFFSET) >> >> Can we get the SPI base from DT? >> > > We are doing that in U-boot (see the ofdata_to_platdata() callback in patch 4). > We need hardcoded static platdata for SPL. Was this not clear from the commit > message? > Then why not move these defines to arch/arm/mach-omap2/am33xx/board.c as well? Regards Vignesh
Hi Vignesh, On 07/09/20 1:48 pm, Vignesh Raghavendra wrote: > > > On 9/7/20 12:36 PM, Faiz Abbas wrote: >> Hi Lokesh, >> >> On 07/09/20 12:08 pm, Lokesh Vutla wrote: >>> >>> >>> On 02/09/20 4:48 pm, Faiz Abbas wrote: >>>> Add platform data and a device structure for the spi device >>>> present on am335x-icev2. This requires moving all omap3_spi >>>> platform data structures and symbols to an omap3_spi.h so that >>>> the board file can access them. >>>> >>>> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> >>>> --- >>>> arch/arm/mach-omap2/am33xx/board.c | 12 +++++ >>>> drivers/spi/omap3_spi.c | 70 +-------------------------- >>>> include/configs/am335x_evm.h | 4 ++ >>>> include/omap3_spi.h | 78 ++++++++++++++++++++++++++++++ >>>> 4 files changed, 95 insertions(+), 69 deletions(-) >>>> create mode 100644 include/omap3_spi.h >>>> >>>> diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c >>>> index a7b56b6bb3..2c2b38721f 100644 >>>> --- a/arch/arm/mach-omap2/am33xx/board.c >>>> +++ b/arch/arm/mach-omap2/am33xx/board.c >>>> @@ -14,6 +14,7 @@ >>>> #include <init.h> >>>> #include <net.h> >>>> #include <ns16550.h> >>>> +#include <omap3_spi.h> >>>> #include <spl.h> >>>> #include <asm/arch/cpu.h> >>>> #include <asm/arch/hardware.h> >>>> @@ -142,6 +143,17 @@ U_BOOT_DEVICES(am33xx_gpios) = { >>>> #endif >>>> }; >>>> #endif >>>> +#if CONFIG_IS_ENABLED(DM_SPI) && !CONFIG_IS_ENABLED(OF_CONTROL) >>>> +static const struct omap3_spi_plat omap3_spi_pdata = { >>>> + .regs = (struct mcspi *)AM33XX_SPI_OFFSET, >>>> + .pin_dir = MCSPI_PINDIR_D0_IN_D1_OUT, >>>> +}; >>>> + >>>> +U_BOOT_DEVICE(am33xx_spi) = { >>>> + .name = "omap3_spi", >>>> + .platdata = &omap3_spi_pdata, >>>> +}; >>>> +#endif >>>> #endif >>>> >>>> #if !CONFIG_IS_ENABLED(DM_GPIO) >>>> diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c >>>> index 08daacf6f0..56cb217486 100644 >>>> --- a/drivers/spi/omap3_spi.c >>>> +++ b/drivers/spi/omap3_spi.c >>>> @@ -22,82 +22,14 @@ >>>> #include <malloc.h> >>>> #include <asm/io.h> >>>> #include <linux/bitops.h> >>>> +#include <omap3_spi.h> >>>> >>>> DECLARE_GLOBAL_DATA_PTR; >>>> >>>> -#define OMAP4_MCSPI_REG_OFFSET 0x100 >>>> - >>>> struct omap2_mcspi_platform_config { >>>> unsigned int regs_offset; >>>> }; >>>> >>>> -/* per-register bitmasks */ >>>> -#define OMAP3_MCSPI_SYSCONFIG_SMARTIDLE (2 << 3) >>>> -#define OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP BIT(2) >>>> -#define OMAP3_MCSPI_SYSCONFIG_AUTOIDLE BIT(0) >>>> -#define OMAP3_MCSPI_SYSCONFIG_SOFTRESET BIT(1) >>>> - >>>> -#define OMAP3_MCSPI_SYSSTATUS_RESETDONE BIT(0) >>>> - >>>> -#define OMAP3_MCSPI_MODULCTRL_SINGLE BIT(0) >>>> -#define OMAP3_MCSPI_MODULCTRL_MS BIT(2) >>>> -#define OMAP3_MCSPI_MODULCTRL_STEST BIT(3) >>>> - >>>> -#define OMAP3_MCSPI_CHCONF_PHA BIT(0) >>>> -#define OMAP3_MCSPI_CHCONF_POL BIT(1) >>>> -#define OMAP3_MCSPI_CHCONF_CLKD_MASK GENMASK(5, 2) >>>> -#define OMAP3_MCSPI_CHCONF_EPOL BIT(6) >>>> -#define OMAP3_MCSPI_CHCONF_WL_MASK GENMASK(11, 7) >>>> -#define OMAP3_MCSPI_CHCONF_TRM_RX_ONLY BIT(12) >>>> -#define OMAP3_MCSPI_CHCONF_TRM_TX_ONLY BIT(13) >>>> -#define OMAP3_MCSPI_CHCONF_TRM_MASK GENMASK(13, 12) >>>> -#define OMAP3_MCSPI_CHCONF_DMAW BIT(14) >>>> -#define OMAP3_MCSPI_CHCONF_DMAR BIT(15) >>>> -#define OMAP3_MCSPI_CHCONF_DPE0 BIT(16) >>>> -#define OMAP3_MCSPI_CHCONF_DPE1 BIT(17) >>>> -#define OMAP3_MCSPI_CHCONF_IS BIT(18) >>>> -#define OMAP3_MCSPI_CHCONF_TURBO BIT(19) >>>> -#define OMAP3_MCSPI_CHCONF_FORCE BIT(20) >>>> - >>>> -#define OMAP3_MCSPI_CHSTAT_RXS BIT(0) >>>> -#define OMAP3_MCSPI_CHSTAT_TXS BIT(1) >>>> -#define OMAP3_MCSPI_CHSTAT_EOT BIT(2) >>>> - >>>> -#define OMAP3_MCSPI_CHCTRL_EN BIT(0) >>>> -#define OMAP3_MCSPI_CHCTRL_DIS (0 << 0) >>>> - >>>> -#define OMAP3_MCSPI_WAKEUPENABLE_WKEN BIT(0) >>>> -#define MCSPI_PINDIR_D0_IN_D1_OUT 0 >>>> -#define MCSPI_PINDIR_D0_OUT_D1_IN 1 >>>> - >>>> -#define OMAP3_MCSPI_MAX_FREQ 48000000 >>>> -#define SPI_WAIT_TIMEOUT 10 >>>> - >>>> -/* OMAP3 McSPI registers */ >>>> -struct mcspi_channel { >>>> - unsigned int chconf; /* 0x2C, 0x40, 0x54, 0x68 */ >>>> - unsigned int chstat; /* 0x30, 0x44, 0x58, 0x6C */ >>>> - unsigned int chctrl; /* 0x34, 0x48, 0x5C, 0x70 */ >>>> - unsigned int tx; /* 0x38, 0x4C, 0x60, 0x74 */ >>>> - unsigned int rx; /* 0x3C, 0x50, 0x64, 0x78 */ >>>> -}; >>>> - >>>> -struct mcspi { >>>> - unsigned char res1[0x10]; >>>> - unsigned int sysconfig; /* 0x10 */ >>>> - unsigned int sysstatus; /* 0x14 */ >>>> - unsigned int irqstatus; /* 0x18 */ >>>> - unsigned int irqenable; /* 0x1C */ >>>> - unsigned int wakeupenable; /* 0x20 */ >>>> - unsigned int syst; /* 0x24 */ >>>> - unsigned int modulctrl; /* 0x28 */ >>>> - struct mcspi_channel channel[4]; >>>> - /* channel0: 0x2C - 0x3C, bus 0 & 1 & 2 & 3 */ >>>> - /* channel1: 0x40 - 0x50, bus 0 & 1 */ >>>> - /* channel2: 0x54 - 0x64, bus 0 & 1 */ >>>> - /* channel3: 0x68 - 0x78, bus 0 */ >>>> -}; >>>> - >>>> struct omap3_spi_priv { >>>> struct mcspi *regs; >>>> unsigned int cs; >>>> diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h >>>> index 9c4ef369c5..db1a89ad30 100644 >>>> --- a/include/configs/am335x_evm.h >>>> +++ b/include/configs/am335x_evm.h >>>> @@ -281,6 +281,10 @@ >>>> #endif >>>> >>>> /* SPI flash. */ >>>> +#if CONFIG_IS_ENABLED(DM_SPI) >>>> +#define AM33XX_SPI_BASE 0x48030000 > > Could this be more specific? AM33XX_SPI<instance num>_BASE? Isn't there only one McSPI instance in am335x? > >>>> +#define AM33XX_SPI_OFFSET (AM33XX_SPI_BASE + OMAP4_MCSPI_REG_OFFSET) >>> >>> Can we get the SPI base from DT? >>> >> >> We are doing that in U-boot (see the ofdata_to_platdata() callback in patch 4). >> We need hardcoded static platdata for SPL. Was this not clear from the commit >> message? >> > > Then why not move these defines to arch/arm/mach-omap2/am33xx/board.c as > well? All the other base addresses used in arch/arm/mach-omap2/am33xx/board.c are included from here. For example see UART platdata (struct ns16550_platdata am33xx_serial[]). Thanks, Faiz
Hi, On 9/7/20 4:02 PM, Faiz Abbas wrote: > Hi Vignesh, > > On 07/09/20 1:48 pm, Vignesh Raghavendra wrote: >> >> >> On 9/7/20 12:36 PM, Faiz Abbas wrote: >>> Hi Lokesh, >>> >>> On 07/09/20 12:08 pm, Lokesh Vutla wrote: >>>> [...] >>>>> struct omap3_spi_priv { >>>>> struct mcspi *regs; >>>>> unsigned int cs; >>>>> diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h >>>>> index 9c4ef369c5..db1a89ad30 100644 >>>>> --- a/include/configs/am335x_evm.h >>>>> +++ b/include/configs/am335x_evm.h >>>>> @@ -281,6 +281,10 @@ >>>>> #endif >>>>> >>>>> /* SPI flash. */ >>>>> +#if CONFIG_IS_ENABLED(DM_SPI) >>>>> +#define AM33XX_SPI_BASE 0x48030000 >> >> Could this be more specific? AM33XX_SPI<instance num>_BASE? > > Isn't there only one McSPI instance in am335x? > No, there are 2 SPI ports on AM335x (see arch/arm/dts/am33xx.dtsi). >> >>>>> +#define AM33XX_SPI_OFFSET (AM33XX_SPI_BASE + OMAP4_MCSPI_REG_OFFSET) >>>> >>>> Can we get the SPI base from DT? >>>> >>> >>> We are doing that in U-boot (see the ofdata_to_platdata() callback in patch 4). >>> We need hardcoded static platdata for SPL. Was this not clear from the commit >>> message? >>> >> >> Then why not move these defines to arch/arm/mach-omap2/am33xx/board.c as >> well? > > All the other base addresses used in arch/arm/mach-omap2/am33xx/board.c are included > from here. For example see UART platdata (struct ns16550_platdata am33xx_serial[]). > UART is bad example as those #defines were added in 2012 which predate platdata introduction... Besides what happens when derivative of AM335x (see include/configs/am335x_*.h) want to enable SPI boot? Would each such files need to duplicate this snippet?
Hi Vignesh, On 07/09/20 5:49 pm, Vignesh Raghavendra wrote: > Hi, > > On 9/7/20 4:02 PM, Faiz Abbas wrote: >> Hi Vignesh, >> >> On 07/09/20 1:48 pm, Vignesh Raghavendra wrote: >>> >>> >>> On 9/7/20 12:36 PM, Faiz Abbas wrote: >>>> Hi Lokesh, >>>> >>>> On 07/09/20 12:08 pm, Lokesh Vutla wrote: >>>>> > [...] >>>>>> struct omap3_spi_priv { >>>>>> struct mcspi *regs; >>>>>> unsigned int cs; >>>>>> diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h >>>>>> index 9c4ef369c5..db1a89ad30 100644 >>>>>> --- a/include/configs/am335x_evm.h >>>>>> +++ b/include/configs/am335x_evm.h >>>>>> @@ -281,6 +281,10 @@ >>>>>> #endif >>>>>> >>>>>> /* SPI flash. */ >>>>>> +#if CONFIG_IS_ENABLED(DM_SPI) >>>>>> +#define AM33XX_SPI_BASE 0x48030000 >>> >>> Could this be more specific? AM33XX_SPI<instance num>_BASE? >> >> Isn't there only one McSPI instance in am335x? >> > > No, there are 2 SPI ports on AM335x (see arch/arm/dts/am33xx.dtsi). I see. I'll make the change in v2. > >>> >>>>>> +#define AM33XX_SPI_OFFSET (AM33XX_SPI_BASE + OMAP4_MCSPI_REG_OFFSET) >>>>> >>>>> Can we get the SPI base from DT? >>>>> >>>> >>>> We are doing that in U-boot (see the ofdata_to_platdata() callback in patch 4). >>>> We need hardcoded static platdata for SPL. Was this not clear from the commit >>>> message? >>>> >>> >>> Then why not move these defines to arch/arm/mach-omap2/am33xx/board.c as >>> well? >> >> All the other base addresses used in arch/arm/mach-omap2/am33xx/board.c are included >> from here. For example see UART platdata (struct ns16550_platdata am33xx_serial[]). >> > > UART is bad example as those #defines were added in 2012 which predate > platdata introduction... > > Besides what happens when derivative of AM335x (see > include/configs/am335x_*.h) want to enable SPI boot? Would each such > files need to duplicate this snippet? > Ok. I'll move the base address to the board file. Thanks, Faiz
diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c index a7b56b6bb3..2c2b38721f 100644 --- a/arch/arm/mach-omap2/am33xx/board.c +++ b/arch/arm/mach-omap2/am33xx/board.c @@ -14,6 +14,7 @@ #include <init.h> #include <net.h> #include <ns16550.h> +#include <omap3_spi.h> #include <spl.h> #include <asm/arch/cpu.h> #include <asm/arch/hardware.h> @@ -142,6 +143,17 @@ U_BOOT_DEVICES(am33xx_gpios) = { #endif }; #endif +#if CONFIG_IS_ENABLED(DM_SPI) && !CONFIG_IS_ENABLED(OF_CONTROL) +static const struct omap3_spi_plat omap3_spi_pdata = { + .regs = (struct mcspi *)AM33XX_SPI_OFFSET, + .pin_dir = MCSPI_PINDIR_D0_IN_D1_OUT, +}; + +U_BOOT_DEVICE(am33xx_spi) = { + .name = "omap3_spi", + .platdata = &omap3_spi_pdata, +}; +#endif #endif #if !CONFIG_IS_ENABLED(DM_GPIO) diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c index 08daacf6f0..56cb217486 100644 --- a/drivers/spi/omap3_spi.c +++ b/drivers/spi/omap3_spi.c @@ -22,82 +22,14 @@ #include <malloc.h> #include <asm/io.h> #include <linux/bitops.h> +#include <omap3_spi.h> DECLARE_GLOBAL_DATA_PTR; -#define OMAP4_MCSPI_REG_OFFSET 0x100 - struct omap2_mcspi_platform_config { unsigned int regs_offset; }; -/* per-register bitmasks */ -#define OMAP3_MCSPI_SYSCONFIG_SMARTIDLE (2 << 3) -#define OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP BIT(2) -#define OMAP3_MCSPI_SYSCONFIG_AUTOIDLE BIT(0) -#define OMAP3_MCSPI_SYSCONFIG_SOFTRESET BIT(1) - -#define OMAP3_MCSPI_SYSSTATUS_RESETDONE BIT(0) - -#define OMAP3_MCSPI_MODULCTRL_SINGLE BIT(0) -#define OMAP3_MCSPI_MODULCTRL_MS BIT(2) -#define OMAP3_MCSPI_MODULCTRL_STEST BIT(3) - -#define OMAP3_MCSPI_CHCONF_PHA BIT(0) -#define OMAP3_MCSPI_CHCONF_POL BIT(1) -#define OMAP3_MCSPI_CHCONF_CLKD_MASK GENMASK(5, 2) -#define OMAP3_MCSPI_CHCONF_EPOL BIT(6) -#define OMAP3_MCSPI_CHCONF_WL_MASK GENMASK(11, 7) -#define OMAP3_MCSPI_CHCONF_TRM_RX_ONLY BIT(12) -#define OMAP3_MCSPI_CHCONF_TRM_TX_ONLY BIT(13) -#define OMAP3_MCSPI_CHCONF_TRM_MASK GENMASK(13, 12) -#define OMAP3_MCSPI_CHCONF_DMAW BIT(14) -#define OMAP3_MCSPI_CHCONF_DMAR BIT(15) -#define OMAP3_MCSPI_CHCONF_DPE0 BIT(16) -#define OMAP3_MCSPI_CHCONF_DPE1 BIT(17) -#define OMAP3_MCSPI_CHCONF_IS BIT(18) -#define OMAP3_MCSPI_CHCONF_TURBO BIT(19) -#define OMAP3_MCSPI_CHCONF_FORCE BIT(20) - -#define OMAP3_MCSPI_CHSTAT_RXS BIT(0) -#define OMAP3_MCSPI_CHSTAT_TXS BIT(1) -#define OMAP3_MCSPI_CHSTAT_EOT BIT(2) - -#define OMAP3_MCSPI_CHCTRL_EN BIT(0) -#define OMAP3_MCSPI_CHCTRL_DIS (0 << 0) - -#define OMAP3_MCSPI_WAKEUPENABLE_WKEN BIT(0) -#define MCSPI_PINDIR_D0_IN_D1_OUT 0 -#define MCSPI_PINDIR_D0_OUT_D1_IN 1 - -#define OMAP3_MCSPI_MAX_FREQ 48000000 -#define SPI_WAIT_TIMEOUT 10 - -/* OMAP3 McSPI registers */ -struct mcspi_channel { - unsigned int chconf; /* 0x2C, 0x40, 0x54, 0x68 */ - unsigned int chstat; /* 0x30, 0x44, 0x58, 0x6C */ - unsigned int chctrl; /* 0x34, 0x48, 0x5C, 0x70 */ - unsigned int tx; /* 0x38, 0x4C, 0x60, 0x74 */ - unsigned int rx; /* 0x3C, 0x50, 0x64, 0x78 */ -}; - -struct mcspi { - unsigned char res1[0x10]; - unsigned int sysconfig; /* 0x10 */ - unsigned int sysstatus; /* 0x14 */ - unsigned int irqstatus; /* 0x18 */ - unsigned int irqenable; /* 0x1C */ - unsigned int wakeupenable; /* 0x20 */ - unsigned int syst; /* 0x24 */ - unsigned int modulctrl; /* 0x28 */ - struct mcspi_channel channel[4]; - /* channel0: 0x2C - 0x3C, bus 0 & 1 & 2 & 3 */ - /* channel1: 0x40 - 0x50, bus 0 & 1 */ - /* channel2: 0x54 - 0x64, bus 0 & 1 */ - /* channel3: 0x68 - 0x78, bus 0 */ -}; - struct omap3_spi_priv { struct mcspi *regs; unsigned int cs; diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 9c4ef369c5..db1a89ad30 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -281,6 +281,10 @@ #endif /* SPI flash. */ +#if CONFIG_IS_ENABLED(DM_SPI) +#define AM33XX_SPI_BASE 0x48030000 +#define AM33XX_SPI_OFFSET (AM33XX_SPI_BASE + OMAP4_MCSPI_REG_OFFSET) +#endif /* Network. */ /* Enable Atheros phy driver */ diff --git a/include/omap3_spi.h b/include/omap3_spi.h new file mode 100644 index 0000000000..cae3770583 --- /dev/null +++ b/include/omap3_spi.h @@ -0,0 +1,78 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +#ifndef __OMAP3_SPI_H_ +#define __OMAP3_SPI_H_ + +/* per-register bitmasks */ +#define OMAP3_MCSPI_SYSCONFIG_SMARTIDLE (2 << 3) +#define OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP BIT(2) +#define OMAP3_MCSPI_SYSCONFIG_AUTOIDLE BIT(0) +#define OMAP3_MCSPI_SYSCONFIG_SOFTRESET BIT(1) + +#define OMAP3_MCSPI_SYSSTATUS_RESETDONE BIT(0) + +#define OMAP3_MCSPI_MODULCTRL_SINGLE BIT(0) +#define OMAP3_MCSPI_MODULCTRL_MS BIT(2) +#define OMAP3_MCSPI_MODULCTRL_STEST BIT(3) + +#define OMAP3_MCSPI_CHCONF_PHA BIT(0) +#define OMAP3_MCSPI_CHCONF_POL BIT(1) +#define OMAP3_MCSPI_CHCONF_CLKD_MASK GENMASK(5, 2) +#define OMAP3_MCSPI_CHCONF_EPOL BIT(6) +#define OMAP3_MCSPI_CHCONF_WL_MASK GENMASK(11, 7) +#define OMAP3_MCSPI_CHCONF_TRM_RX_ONLY BIT(12) +#define OMAP3_MCSPI_CHCONF_TRM_TX_ONLY BIT(13) +#define OMAP3_MCSPI_CHCONF_TRM_MASK GENMASK(13, 12) +#define OMAP3_MCSPI_CHCONF_DMAW BIT(14) +#define OMAP3_MCSPI_CHCONF_DMAR BIT(15) +#define OMAP3_MCSPI_CHCONF_DPE0 BIT(16) +#define OMAP3_MCSPI_CHCONF_DPE1 BIT(17) +#define OMAP3_MCSPI_CHCONF_IS BIT(18) +#define OMAP3_MCSPI_CHCONF_TURBO BIT(19) +#define OMAP3_MCSPI_CHCONF_FORCE BIT(20) + +#define OMAP3_MCSPI_CHSTAT_RXS BIT(0) +#define OMAP3_MCSPI_CHSTAT_TXS BIT(1) +#define OMAP3_MCSPI_CHSTAT_EOT BIT(2) + +#define OMAP3_MCSPI_CHCTRL_EN BIT(0) +#define OMAP3_MCSPI_CHCTRL_DIS (0 << 0) + +#define OMAP3_MCSPI_WAKEUPENABLE_WKEN BIT(0) +#define MCSPI_PINDIR_D0_IN_D1_OUT 0 +#define MCSPI_PINDIR_D0_OUT_D1_IN 1 + +#define OMAP3_MCSPI_MAX_FREQ 48000000 +#define SPI_WAIT_TIMEOUT 10 + +#define OMAP4_MCSPI_REG_OFFSET 0x100 + +/* OMAP3 McSPI registers */ +struct mcspi_channel { + unsigned int chconf; /* 0x2C, 0x40, 0x54, 0x68 */ + unsigned int chstat; /* 0x30, 0x44, 0x58, 0x6C */ + unsigned int chctrl; /* 0x34, 0x48, 0x5C, 0x70 */ + unsigned int tx; /* 0x38, 0x4C, 0x60, 0x74 */ + unsigned int rx; /* 0x3C, 0x50, 0x64, 0x78 */ +}; + +struct mcspi { + unsigned char res1[0x10]; + unsigned int sysconfig; /* 0x10 */ + unsigned int sysstatus; /* 0x14 */ + unsigned int irqstatus; /* 0x18 */ + unsigned int irqenable; /* 0x1C */ + unsigned int wakeupenable; /* 0x20 */ + unsigned int syst; /* 0x24 */ + unsigned int modulctrl; /* 0x28 */ + struct mcspi_channel channel[4]; + /* channel0: 0x2C - 0x3C, bus 0 & 1 & 2 & 3 */ + /* channel1: 0x40 - 0x50, bus 0 & 1 */ + /* channel2: 0x54 - 0x64, bus 0 & 1 */ + /* channel3: 0x68 - 0x78, bus 0 */ +}; + +struct omap3_spi_plat { + struct mcspi *regs; + unsigned int pin_dir:1; +}; +#endif
Add platform data and a device structure for the spi device present on am335x-icev2. This requires moving all omap3_spi platform data structures and symbols to an omap3_spi.h so that the board file can access them. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> --- arch/arm/mach-omap2/am33xx/board.c | 12 +++++ drivers/spi/omap3_spi.c | 70 +-------------------------- include/configs/am335x_evm.h | 4 ++ include/omap3_spi.h | 78 ++++++++++++++++++++++++++++++ 4 files changed, 95 insertions(+), 69 deletions(-) create mode 100644 include/omap3_spi.h