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[89.183.122.221]) by smtp.gmail.com with ESMTPSA id b131sm2914911wmc.8.2020.08.28.07.56.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Aug 2020 07:56:30 -0700 (PDT) From: Andre Heider To: Stefan Roese , Konstantin Porotchkin , =?utf-8?q?Pali_Roh=C3=A1r?= Cc: u-boot@lists.denx.de, zachary , Ken Ma , Igal Liberman Subject: [PATCH] phy: marvell: a3700: add sata comphy on lane 2 with invert option Date: Fri, 28 Aug 2020 16:56:29 +0200 Message-Id: <20200828145629.540954-1-a.heider@gmail.com> X-Mailer: git-send-email 2.28.0 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: zachary - This patch moves sata phy powerup from dedicate phy to compphy and adds invert option for sata powerup routine. Change-Id: I1b4e8753e2b2c14c6efa97bca2ffc7d2553d8a90 Signed-off-by: zachary Signed-off-by: Ken Ma Reviewed-on: http://vgitil04.il.marvell.com:8080/53601 Reviewed-by: Igal Liberman Tested-by: Igal Liberman [a.heider: adapt to mainline] Signed-off-by: Andre Heider Tested-by: Pali Rohár Reviewed-by: Stefan Roese --- This is based on the downstream patch: https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/0a5b159806baa0746b6449920e450498bc269ba7 Fixes SATA on my espressobin v5. drivers/phy/marvell/comphy_a3700.c | 33 +++++++++++++----------------- 1 file changed, 14 insertions(+), 19 deletions(-) diff --git a/drivers/phy/marvell/comphy_a3700.c b/drivers/phy/marvell/comphy_a3700.c index dc188c44e0..4606de6f48 100644 --- a/drivers/phy/marvell/comphy_a3700.c +++ b/drivers/phy/marvell/comphy_a3700.c @@ -273,16 +273,23 @@ static void reg_set_indirect(u32 reg, u16 data, u16 mask) * * return: 1 if PLL locked (OK), 0 otherwise (FAIL) */ -static int comphy_sata_power_up(void) +static int comphy_sata_power_up(u32 invert) { int ret; + u32 data = 0; debug_enter(); /* - * 0. Swap SATA TX lines + * 0. Check the Polarity invert bits */ - reg_set_indirect(vphy_sync_pattern_reg, bs_txd_inv, bs_txd_inv); + if (invert & PHY_POLARITY_TXD_INVERT) + data |= bs_txd_inv; + + if (invert & PHY_POLARITY_RXD_INVERT) + data |= bs_rxd_inv; + + reg_set_indirect(vphy_sync_pattern_reg, data, bs_txd_inv | bs_rxd_inv); /* * 1. Select 40-bit data width width @@ -924,22 +931,6 @@ void comphy_dedicated_phys_init(void) } } - node = fdt_node_offset_by_compatible(blob, -1, - "marvell,armada-3700-ahci"); - if (node > 0) { - if (fdtdec_get_is_enabled(blob, node)) { - ret = comphy_sata_power_up(); - if (!ret) - printf("Failed to initialize SATA PHY\n"); - else - debug("SATA PHY init succeed\n"); - } else { - debug("SATA node is disabled\n"); - } - } else { - debug("No SATA node in DT\n"); - } - node = fdt_node_offset_by_compatible(blob, -1, "marvell,armada-8k-sdhci"); if (node <= 0) { @@ -1007,6 +998,10 @@ int comphy_a3700_init(struct chip_serdes_phy_config *chip_cfg, comphy_map->invert); break; + case PHY_TYPE_SATA0: + ret = comphy_sata_power_up(comphy_map->invert); + break; + default: debug("Unknown SerDes type, skip initialize SerDes %d\n", lane);